1/* 2 * Copyright (c) 2019 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv7-m.dtsi> 8#include <nordic/nrf_common.dtsi> 9 10/ { 11 chosen { 12 zephyr,bt-hci = &bt_hci_controller; 13 zephyr,entropy = &rng; 14 zephyr,flash-controller = &flash_controller; 15 }; 16 17 cpus { 18 #address-cells = <1>; 19 #size-cells = <0>; 20 21 cpu@0 { 22 device_type = "cpu"; 23 compatible = "arm,cortex-m4f"; 24 reg = <0>; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 28 itm: itm@e0000000 { 29 compatible = "arm,armv7m-itm"; 30 reg = <0xe0000000 0x1000>; 31 swo-ref-frequency = <32000000>; 32 }; 33 }; 34 }; 35 36 soc { 37 ficr: ficr@10000000 { 38 compatible = "nordic,nrf-ficr"; 39 reg = <0x10000000 0x1000>; 40 #nordic,ficr-cells = <1>; 41 status = "okay"; 42 }; 43 44 uicr: uicr@10001000 { 45 compatible = "nordic,nrf-uicr"; 46 reg = <0x10001000 0x1000>; 47 status = "okay"; 48 }; 49 50 sram0: memory@20000000 { 51 compatible = "mmio-sram"; 52 }; 53 54 clock: clock@40000000 { 55 compatible = "nordic,nrf-clock"; 56 reg = <0x40000000 0x1000>; 57 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 58 status = "okay"; 59 }; 60 61 power: power@40000000 { 62 compatible = "nordic,nrf-power"; 63 reg = <0x40000000 0x1000>; 64 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 65 status = "okay"; 66 #address-cells = <1>; 67 #size-cells = <1>; 68 69 gpregret1: gpregret1@4000051c { 70 #address-cells = <1>; 71 #size-cells = <1>; 72 compatible = "nordic,nrf-gpregret"; 73 reg = <0x4000051c 0x1>; 74 status = "okay"; 75 }; 76 77 gpregret2: gpregret2@40000520 { 78 #address-cells = <1>; 79 #size-cells = <1>; 80 compatible = "nordic,nrf-gpregret"; 81 reg = <0x40000520 0x1>; 82 status = "okay"; 83 }; 84 }; 85 86 radio: radio@40001000 { 87 compatible = "nordic,nrf-radio"; 88 reg = <0x40001000 0x1000>; 89 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 90 status = "okay"; 91 dfe-supported; 92 ieee802154-supported; 93 ble-2mbps-supported; 94 ble-coded-phy-supported; 95 tx-high-power-supported; 96 97 ieee802154: ieee802154 { 98 compatible = "nordic,nrf-ieee802154"; 99 status = "disabled"; 100 }; 101 102 /* Note: In the nRF Connect SDK the SoftDevice Controller 103 * is added and set as the default Bluetooth Controller. 104 */ 105 bt_hci_controller: bt_hci_controller { 106 compatible = "zephyr,bt-hci-ll-sw-split"; 107 status = "okay"; 108 }; 109 }; 110 111 uart0: uart@40002000 { 112 /* uart can be either UART or UARTE, for the user to pick */ 113 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 114 compatible = "nordic,nrf-uarte"; 115 reg = <0x40002000 0x1000>; 116 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 117 status = "disabled"; 118 }; 119 120 i2c0: i2c@40003000 { 121 /* 122 * This i2c node can be TWI, TWIM, or TWIS, 123 * for the user to pick: 124 * compatible = "nordic,nrf-twi" or 125 * "nordic,nrf-twim" or 126 * "nordic,nrf-twis". 127 */ 128 compatible = "nordic,nrf-twim"; 129 #address-cells = <1>; 130 #size-cells = <0>; 131 reg = <0x40003000 0x1000>; 132 clock-frequency = <I2C_BITRATE_STANDARD>; 133 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 134 easydma-maxcnt-bits = <16>; 135 status = "disabled"; 136 }; 137 138 spi0: spi@40003000 { 139 /* 140 * This spi node can be SPI, SPIM, or SPIS, 141 * for the user to pick: 142 * compatible = "nordic,nrf-spi" or 143 * "nordic,nrf-spim" or 144 * "nordic,nrf-spis". 145 */ 146 compatible = "nordic,nrf-spim"; 147 #address-cells = <1>; 148 #size-cells = <0>; 149 reg = <0x40003000 0x1000>; 150 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 151 max-frequency = <DT_FREQ_M(8)>; 152 easydma-maxcnt-bits = <16>; 153 status = "disabled"; 154 }; 155 156 i2c1: i2c@40004000 { 157 /* 158 * This i2c node can be TWI, TWIM, or TWIS, 159 * for the user to pick: 160 * compatible = "nordic,nrf-twi" or 161 * "nordic,nrf-twim" or 162 * "nordic,nrf-twis". 163 */ 164 compatible = "nordic,nrf-twim"; 165 #address-cells = <1>; 166 #size-cells = <0>; 167 reg = <0x40004000 0x1000>; 168 clock-frequency = <I2C_BITRATE_STANDARD>; 169 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 170 easydma-maxcnt-bits = <16>; 171 status = "disabled"; 172 }; 173 174 spi1: spi@40004000 { 175 /* 176 * This spi node can be SPI, SPIM, or SPIS, 177 * for the user to pick: 178 * compatible = "nordic,nrf-spi" or 179 * "nordic,nrf-spim" or 180 * "nordic,nrf-spis". 181 */ 182 compatible = "nordic,nrf-spim"; 183 #address-cells = <1>; 184 #size-cells = <0>; 185 reg = <0x40004000 0x1000>; 186 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 187 max-frequency = <DT_FREQ_M(8)>; 188 easydma-maxcnt-bits = <16>; 189 status = "disabled"; 190 }; 191 192 nfct: nfct@40005000 { 193 compatible = "nordic,nrf-nfct"; 194 reg = <0x40005000 0x1000>; 195 interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; 196 status = "disabled"; 197 }; 198 199 gpiote: gpiote0: gpiote@40006000 { 200 compatible = "nordic,nrf-gpiote"; 201 reg = <0x40006000 0x1000>; 202 interrupts = <6 5>; 203 status = "disabled"; 204 instance = <0>; 205 }; 206 207 adc: adc@40007000 { 208 compatible = "nordic,nrf-saadc"; 209 reg = <0x40007000 0x1000>; 210 interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>; 211 status = "disabled"; 212 #io-channel-cells = <1>; 213 }; 214 215 timer0: timer@40008000 { 216 compatible = "nordic,nrf-timer"; 217 status = "disabled"; 218 reg = <0x40008000 0x1000>; 219 cc-num = <4>; 220 max-bit-width = <32>; 221 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 222 prescaler = <0>; 223 }; 224 225 timer1: timer@40009000 { 226 compatible = "nordic,nrf-timer"; 227 status = "disabled"; 228 reg = <0x40009000 0x1000>; 229 cc-num = <4>; 230 max-bit-width = <32>; 231 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 232 prescaler = <0>; 233 }; 234 235 timer2: timer@4000a000 { 236 compatible = "nordic,nrf-timer"; 237 status = "disabled"; 238 reg = <0x4000a000 0x1000>; 239 cc-num = <4>; 240 max-bit-width = <32>; 241 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 242 prescaler = <0>; 243 }; 244 245 rtc0: rtc@4000b000 { 246 compatible = "nordic,nrf-rtc"; 247 reg = <0x4000b000 0x1000>; 248 cc-num = <3>; 249 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 250 status = "disabled"; 251 clock-frequency = <32768>; 252 prescaler = <1>; 253 }; 254 255 temp: temp@4000c000 { 256 compatible = "nordic,nrf-temp"; 257 reg = <0x4000c000 0x1000>; 258 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 259 status = "okay"; 260 }; 261 262 rng: random@4000d000 { 263 compatible = "nordic,nrf-rng"; 264 reg = <0x4000d000 0x1000>; 265 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 266 status = "okay"; 267 }; 268 269 ecb: ecb@4000e000 { 270 compatible = "nordic,nrf-ecb"; 271 reg = <0x4000e000 0x1000>; 272 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 273 status = "okay"; 274 }; 275 276 ccm: ccm@4000f000 { 277 compatible = "nordic,nrf-ccm"; 278 reg = <0x4000f000 0x1000>; 279 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 280 length-field-length-8-bits; 281 headermask-supported; 282 status = "okay"; 283 }; 284 285 wdt: wdt0: watchdog@40010000 { 286 compatible = "nordic,nrf-wdt"; 287 reg = <0x40010000 0x1000>; 288 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 289 status = "okay"; 290 }; 291 292 rtc1: rtc@40011000 { 293 compatible = "nordic,nrf-rtc"; 294 reg = <0x40011000 0x1000>; 295 cc-num = <4>; 296 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 297 status = "disabled"; 298 clock-frequency = <32768>; 299 prescaler = <1>; 300 }; 301 302 qdec: qdec0: qdec@40012000 { 303 compatible = "nordic,nrf-qdec"; 304 reg = <0x40012000 0x1000>; 305 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 306 status = "disabled"; 307 }; 308 309 comp: comparator@40013000 { 310 /* 311 * This comparator node can be COMP or LPCOMP, 312 * for the user to pick: 313 * compatible = "nordic,nrf-comp" or 314 * "nordic,nrf-lpcomp". 315 */ 316 compatible = "nordic,nrf-comp"; 317 reg = <0x40013000 0x1000>; 318 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 319 status = "disabled"; 320 #io-channel-cells = <1>; 321 }; 322 323 egu0: swi0: egu@40014000 { 324 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 325 reg = <0x40014000 0x1000>; 326 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 327 status = "okay"; 328 }; 329 330 egu1: swi1: egu@40015000 { 331 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 332 reg = <0x40015000 0x1000>; 333 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 334 status = "okay"; 335 }; 336 337 egu2: swi2: egu@40016000 { 338 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 339 reg = <0x40016000 0x1000>; 340 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 341 status = "okay"; 342 }; 343 344 egu3: swi3: egu@40017000 { 345 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 346 reg = <0x40017000 0x1000>; 347 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 348 status = "okay"; 349 }; 350 351 egu4: swi4: egu@40018000 { 352 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 353 reg = <0x40018000 0x1000>; 354 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 355 status = "okay"; 356 }; 357 358 egu5: swi5: egu@40019000 { 359 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 360 reg = <0x40019000 0x1000>; 361 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 362 status = "okay"; 363 }; 364 365 timer3: timer@4001a000 { 366 compatible = "nordic,nrf-timer"; 367 status = "disabled"; 368 reg = <0x4001a000 0x1000>; 369 cc-num = <6>; 370 max-bit-width = <32>; 371 interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; 372 prescaler = <0>; 373 }; 374 375 timer4: timer@4001b000 { 376 compatible = "nordic,nrf-timer"; 377 status = "disabled"; 378 reg = <0x4001b000 0x1000>; 379 cc-num = <6>; 380 max-bit-width = <32>; 381 interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>; 382 prescaler = <0>; 383 }; 384 385 pwm0: pwm@4001c000 { 386 compatible = "nordic,nrf-pwm"; 387 reg = <0x4001c000 0x1000>; 388 interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; 389 status = "disabled"; 390 #pwm-cells = <3>; 391 }; 392 393 pdm0: pdm@4001d000 { 394 compatible = "nordic,nrf-pdm"; 395 reg = <0x4001d000 0x1000>; 396 interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; 397 status = "disabled"; 398 }; 399 400 acl: acl@4001e000 { 401 compatible = "nordic,nrf-acl"; 402 reg = <0x4001e000 0x1000>; 403 status = "okay"; 404 }; 405 406 flash_controller: flash-controller@4001e000 { 407 compatible = "nordic,nrf52-flash-controller"; 408 reg = <0x4001e000 0x1000>; 409 partial-erase; 410 411 #address-cells = <1>; 412 #size-cells = <1>; 413 414 415 flash0: flash@0 { 416 compatible = "soc-nv-flash"; 417 erase-block-size = <4096>; 418 write-block-size = <4>; 419 }; 420 }; 421 422 ppi: ppi@4001f000 { 423 compatible = "nordic,nrf-ppi"; 424 reg = <0x4001f000 0x1000>; 425 status = "okay"; 426 }; 427 428 mwu: mwu@40020000 { 429 compatible = "nordic,nrf-mwu"; 430 reg = <0x40020000 0x1000>; 431 status = "okay"; 432 }; 433 434 pwm1: pwm@40021000 { 435 compatible = "nordic,nrf-pwm"; 436 reg = <0x40021000 0x1000>; 437 interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>; 438 status = "disabled"; 439 #pwm-cells = <3>; 440 }; 441 442 pwm2: pwm@40022000 { 443 compatible = "nordic,nrf-pwm"; 444 reg = <0x40022000 0x1000>; 445 interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>; 446 status = "disabled"; 447 #pwm-cells = <3>; 448 }; 449 450 spi2: spi@40023000 { 451 /* 452 * This spi node can be SPI, SPIM, or SPIS, 453 * for the user to pick: 454 * compatible = "nordic,nrf-spi" or 455 * "nordic,nrf-spim" or 456 * "nordic,nrf-spis". 457 */ 458 compatible = "nordic,nrf-spim"; 459 #address-cells = <1>; 460 #size-cells = <0>; 461 reg = <0x40023000 0x1000>; 462 interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>; 463 max-frequency = <DT_FREQ_M(8)>; 464 easydma-maxcnt-bits = <16>; 465 status = "disabled"; 466 }; 467 468 rtc2: rtc@40024000 { 469 compatible = "nordic,nrf-rtc"; 470 reg = <0x40024000 0x1000>; 471 cc-num = <4>; 472 interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>; 473 status = "disabled"; 474 clock-frequency = <32768>; 475 prescaler = <1>; 476 }; 477 478 i2s0: i2s@40025000 { 479 compatible = "nordic,nrf-i2s"; 480 #address-cells = <1>; 481 #size-cells = <0>; 482 reg = <0x40025000 0x1000>; 483 interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>; 484 status = "disabled"; 485 }; 486 487 usbd: usbd@40027000 { 488 compatible = "nordic,nrf-usbd"; 489 reg = <0x40027000 0x1000>; 490 interrupts = <39 NRF_DEFAULT_IRQ_PRIORITY>; 491 num-bidir-endpoints = <1>; 492 num-in-endpoints = <7>; 493 num-out-endpoints = <7>; 494 num-isoin-endpoints = <1>; 495 num-isoout-endpoints = <1>; 496 status = "disabled"; 497 }; 498 499 uart1: uart@40028000 { 500 compatible = "nordic,nrf-uarte"; 501 reg = <0x40028000 0x1000>; 502 interrupts = <40 NRF_DEFAULT_IRQ_PRIORITY>; 503 status = "disabled"; 504 }; 505 506 pwm3: pwm@4002d000 { 507 compatible = "nordic,nrf-pwm"; 508 reg = <0x4002d000 0x1000>; 509 interrupts = <45 NRF_DEFAULT_IRQ_PRIORITY>; 510 status = "disabled"; 511 #pwm-cells = <3>; 512 }; 513 514 spi3: spi@4002f000 { 515 compatible = "nordic,nrf-spim"; 516 #address-cells = <1>; 517 #size-cells = <0>; 518 reg = <0x4002f000 0x1000>; 519 interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>; 520 max-frequency = <DT_FREQ_M(32)>; 521 easydma-maxcnt-bits = <16>; 522 rx-delay-supported; 523 rx-delay = <2>; 524 status = "disabled"; 525 }; 526 527 gpio0: gpio@50000000 { 528 compatible = "nordic,nrf-gpio"; 529 gpio-controller; 530 reg = <0x50000000 0x200 531 0x50000500 0x300>; 532 #gpio-cells = <2>; 533 status = "disabled"; 534 port = <0>; 535 gpiote-instance = <&gpiote>; 536 }; 537 538 gpio1: gpio@50000300 { 539 compatible = "nordic,nrf-gpio"; 540 gpio-controller; 541 reg = <0x50000300 0x200 542 0x50000800 0x300>; 543 #gpio-cells = <2>; 544 ngpios = <10>; 545 status = "disabled"; 546 port = <1>; 547 gpiote-instance = <&gpiote>; 548 }; 549 }; 550}; 551 552&nvic { 553 arm,num-irq-priority-bits = <3>; 554}; 555 556&systick { 557 /* Use RTC for system clock, instead of SysTick. */ 558 status = "disabled"; 559}; 560
