1/* 2 * Copyright (c) 2022 Schlumberger 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6#include <infineon/cat3/xmc/xmc4xxx.dtsi> 7#include <zephyr/dt-bindings/pinctrl/xmc4xxx-pinctrl.h> 8 9&pinctrl { 10 /omit-if-no-ref/ uart_tx_p0_1_u1c1: uart_tx_p0_1_u1c1 { 11 pinmux = <XMC4XXX_PINMUX_SET(0, 1, 2)>; 12 }; 13 /omit-if-no-ref/ uart_tx_p0_5_u1c0: uart_tx_p0_5_u1c0 { 14 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 2)>; 15 }; 16 /omit-if-no-ref/ uart_tx_p1_5_u0c0: uart_tx_p1_5_u0c0 { 17 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 2)>; 18 }; 19 /omit-if-no-ref/ uart_tx_p1_7_u0c0: uart_tx_p1_7_u0c0 { 20 pinmux = <XMC4XXX_PINMUX_SET(1, 7, 2)>; 21 }; 22 /omit-if-no-ref/ uart_tx_p2_5_u0c1: uart_tx_p2_5_u0c1 { 23 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 2)>; 24 }; 25 /omit-if-no-ref/ uart_tx_p2_14_u1c0: uart_tx_p2_14_u1c0 { 26 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 2)>; 27 }; 28 /omit-if-no-ref/ uart_tx_p3_5_u2c1: uart_tx_p3_5_u2c1 { 29 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 1)>; 30 }; 31 /omit-if-no-ref/ uart_tx_p3_5_u0c1: uart_tx_p3_5_u0c1 { 32 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 4)>; 33 }; 34 /omit-if-no-ref/ uart_tx_p5_0_u2c0: uart_tx_p5_0_u2c0 { 35 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 1)>; 36 }; 37 /omit-if-no-ref/ uart_tx_p5_1_u0c0: uart_tx_p5_1_u0c0 { 38 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 1)>; 39 }; 40 41 /omit-if-no-ref/ uart_rx_p1_4_u0c0: uart_rx_p1_4_u0c0 { 42 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* USIC input src = DX0B */ 43 }; 44 /omit-if-no-ref/ uart_rx_p1_5_u0c0: uart_rx_p1_5_u0c0 { 45 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 0)>; /* USIC input src = DX0A */ 46 }; 47 /omit-if-no-ref/ uart_rx_p5_0_u0c0: uart_rx_p5_0_u0c0 { 48 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0D */ 49 }; 50 /omit-if-no-ref/ uart_rx_p2_2_u0c1: uart_rx_p2_2_u0c1 { 51 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; /* USIC input src = DX0A */ 52 }; 53 /omit-if-no-ref/ uart_rx_p2_5_u0c1: uart_rx_p2_5_u0c1 { 54 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 0)>; /* USIC input src = DX0B */ 55 }; 56 /omit-if-no-ref/ uart_rx_p4_0_u0c1: uart_rx_p4_0_u0c1 { 57 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0E */ 58 }; 59 /omit-if-no-ref/ uart_rx_p0_4_u1c0: uart_rx_p0_4_u1c0 { 60 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 0)>; /* USIC input src = DX0A */ 61 }; 62 /omit-if-no-ref/ uart_rx_p0_5_u1c0: uart_rx_p0_5_u1c0 { 63 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 0)>; /* USIC input src = DX0B */ 64 }; 65 /omit-if-no-ref/ uart_rx_p2_14_u1c0: uart_rx_p2_14_u1c0 { 66 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 0)>; /* USIC input src = DX0D */ 67 }; 68 /omit-if-no-ref/ uart_rx_p2_15_u1c0: uart_rx_p2_15_u1c0 { 69 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; /* USIC input src = DX0C */ 70 }; 71 /omit-if-no-ref/ uart_rx_p0_0_u1c1: uart_rx_p0_0_u1c1 { 72 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; /* USIC input src = DX0D */ 73 }; 74 /omit-if-no-ref/ uart_rx_p5_0_u2c0: uart_rx_p5_0_u2c0 { 75 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0B */ 76 }; 77 /omit-if-no-ref/ uart_rx_p5_1_u2c0: uart_rx_p5_1_u2c0 { 78 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 0)>; /* USIC input src = DX0A */ 79 }; 80 /omit-if-no-ref/ uart_rx_p3_4_u2c1: uart_rx_p3_4_u2c1 { 81 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 0)>; /* USIC input src = DX0B */ 82 }; 83 /omit-if-no-ref/ uart_rx_p3_5_u2c1: uart_rx_p3_5_u2c1 { 84 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 0)>; /* USIC input src = DX0A */ 85 }; 86 /omit-if-no-ref/ uart_rx_p4_0_u2c1: uart_rx_p4_0_u2c1 { 87 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0C */ 88 }; 89 90 /omit-if-no-ref/ spi_mosi_p0_1_u1c1: spi_mosi_p0_1_u1c1 { 91 pinmux = <XMC4XXX_PINMUX_SET(0, 1, 2)>; 92 }; 93 /omit-if-no-ref/ spi_mosi_p0_5_u1c0: spi_mosi_p0_5_u1c0 { 94 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 2)>; 95 }; 96 /omit-if-no-ref/ spi_mosi_p1_5_u0c0: spi_mosi_p1_5_u0c0 { 97 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 2)>; 98 }; 99 /omit-if-no-ref/ spi_mosi_p1_7_u0c0: spi_mosi_p1_7_u0c0 { 100 pinmux = <XMC4XXX_PINMUX_SET(1, 7, 2)>; 101 }; 102 /omit-if-no-ref/ spi_mosi_p2_5_u0c1: spi_mosi_p2_5_u0c1 { 103 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 2)>; 104 }; 105 /omit-if-no-ref/ spi_mosi_p2_14_u1c0: spi_mosi_p2_14_u1c0 { 106 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 2)>; 107 }; 108 /omit-if-no-ref/ spi_mosi_p3_5_u2c1: spi_mosi_p3_5_u2c1 { 109 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 1)>; 110 }; 111 /omit-if-no-ref/ spi_mosi_p3_5_u0c1: spi_mosi_p3_5_u0c1 { 112 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 4)>; 113 }; 114 /omit-if-no-ref/ spi_mosi_p5_0_u2c0: spi_mosi_p5_0_u2c0 { 115 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 1)>; 116 }; 117 /omit-if-no-ref/ spi_mosi_p5_1_u0c0: spi_mosi_p5_1_u0c0 { 118 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 1)>; 119 }; 120 121 /omit-if-no-ref/ spi_miso_p1_4_u0c0: spi_miso_p1_4_u0c0 { 122 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* USIC input src = DX0B */ 123 }; 124 /omit-if-no-ref/ spi_miso_p1_5_u0c0: spi_miso_p1_5_u0c0 { 125 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 0)>; /* USIC input src = DX0A */ 126 }; 127 /omit-if-no-ref/ spi_miso_p5_0_u0c0: spi_miso_p5_0_u0c0 { 128 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0D */ 129 }; 130 /omit-if-no-ref/ spi_miso_p2_2_u0c1: spi_miso_p2_2_u0c1 { 131 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; /* USIC input src = DX0A */ 132 }; 133 /omit-if-no-ref/ spi_miso_p2_5_u0c1: spi_miso_p2_5_u0c1 { 134 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 0)>; /* USIC input src = DX0B */ 135 }; 136 /omit-if-no-ref/ spi_miso_p4_0_u0c1: spi_miso_p4_0_u0c1 { 137 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0E */ 138 }; 139 /omit-if-no-ref/ spi_miso_p0_4_u1c0: spi_miso_p0_4_u1c0 { 140 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 0)>; /* USIC input src = DX0A */ 141 }; 142 /omit-if-no-ref/ spi_miso_p0_5_u1c0: spi_miso_p0_5_u1c0 { 143 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 0)>; /* USIC input src = DX0B */ 144 }; 145 /omit-if-no-ref/ spi_miso_p2_14_u1c0: spi_miso_p2_14_u1c0 { 146 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 0)>; /* USIC input src = DX0D */ 147 }; 148 /omit-if-no-ref/ spi_miso_p2_15_u1c0: spi_miso_p2_15_u1c0 { 149 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; /* USIC input src = DX0C */ 150 }; 151 /omit-if-no-ref/ spi_miso_p0_0_u1c1: spi_miso_p0_0_u1c1 { 152 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; /* USIC input src = DX0D */ 153 }; 154 /omit-if-no-ref/ spi_miso_p5_0_u2c0: spi_miso_p5_0_u2c0 { 155 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0B */ 156 }; 157 /omit-if-no-ref/ spi_miso_p5_1_u2c0: spi_miso_p5_1_u2c0 { 158 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 0)>; /* USIC input src = DX0A */ 159 }; 160 /omit-if-no-ref/ spi_miso_p3_4_u2c1: spi_miso_p3_4_u2c1 { 161 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 0)>; /* USIC input src = DX0B */ 162 }; 163 /omit-if-no-ref/ spi_miso_p3_5_u2c1: spi_miso_p3_5_u2c1 { 164 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 0)>; /* USIC input src = DX0A */ 165 }; 166 /omit-if-no-ref/ spi_miso_p4_0_u2c1: spi_miso_p4_0_u2c1 { 167 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0C */ 168 }; 169 /omit-if-no-ref/ spi_sclk_p0_8_u0c0: spi_sclk_p0_8_u0c0 { 170 pinmux = <XMC4XXX_PINMUX_SET(0, 8, 2)>; 171 }; 172 /omit-if-no-ref/ spi_sclk_p0_10_u1c1: spi_sclk_p0_10_u1c1 { 173 pinmux = <XMC4XXX_PINMUX_SET(0, 10, 2)>; 174 }; 175 /omit-if-no-ref/ spi_sclk_p0_11_u1c0: spi_sclk_p0_11_u1c0 { 176 pinmux = <XMC4XXX_PINMUX_SET(0, 11, 2)>; 177 }; 178 /omit-if-no-ref/ spi_sclk_p1_1_u0c0: spi_sclk_p1_1_u0c0 { 179 pinmux = <XMC4XXX_PINMUX_SET(1, 1, 2)>; 180 }; 181 /omit-if-no-ref/ spi_sclk_p1_6_u0c0: spi_sclk_p1_6_u0c0 { 182 pinmux = <XMC4XXX_PINMUX_SET(1, 6, 2)>; 183 }; 184 /omit-if-no-ref/ spi_sclk_p1_10_u0c0: spi_sclk_p1_10_u0c0 { 185 pinmux = <XMC4XXX_PINMUX_SET(1, 10, 2)>; 186 }; 187 /omit-if-no-ref/ spi_sclk_p2_4_u0c1: spi_sclk_p2_4_u0c1 { 188 pinmux = <XMC4XXX_PINMUX_SET(2, 4, 2)>; 189 }; 190 /omit-if-no-ref/ spi_sclk_p3_0_u0c1: spi_sclk_p3_0_u0c1 { 191 pinmux = <XMC4XXX_PINMUX_SET(3, 0, 2)>; 192 }; 193 /omit-if-no-ref/ spi_sclk_p3_6_u2c1: spi_sclk_p3_6_u2c1 { 194 pinmux = <XMC4XXX_PINMUX_SET(3, 6, 1)>; 195 }; 196 /omit-if-no-ref/ spi_sclk_p3_6_u0c1: spi_sclk_p3_6_u0c1 { 197 pinmux = <XMC4XXX_PINMUX_SET(3, 6, 4)>; 198 }; 199 /omit-if-no-ref/ spi_sclk_p5_2_u2c0: spi_sclk_p5_2_u2c0 { 200 pinmux = <XMC4XXX_PINMUX_SET(5, 2, 1)>; 201 }; 202 203 /omit-if-no-ref/ pwm_out_p0_12_ccu40_ch3: pwm_out_p0_12_ccu40_ch3 { 204 pinmux = <XMC4XXX_PINMUX_SET(0, 12, 3)>; 205 }; 206 /omit-if-no-ref/ pwm_out_p1_0_ccu40_ch3: pwm_out_p1_0_ccu40_ch3 { 207 pinmux = <XMC4XXX_PINMUX_SET(1, 0, 3)>; 208 }; 209 /omit-if-no-ref/ pwm_out_p1_1_ccu40_ch2: pwm_out_p1_1_ccu40_ch2 { 210 pinmux = <XMC4XXX_PINMUX_SET(1, 1, 3)>; 211 }; 212 /omit-if-no-ref/ pwm_out_p1_2_ccu40_ch1: pwm_out_p1_2_ccu40_ch1 { 213 pinmux = <XMC4XXX_PINMUX_SET(1, 2, 3)>; 214 }; 215 /omit-if-no-ref/ pwm_out_p1_3_ccu40_ch0: pwm_out_p1_3_ccu40_ch0 { 216 pinmux = <XMC4XXX_PINMUX_SET(1, 3, 3)>; 217 }; 218 /omit-if-no-ref/ pwm_out_p2_2_ccu41_ch3: pwm_out_p2_2_ccu41_ch3 { 219 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 3)>; 220 }; 221 /omit-if-no-ref/ pwm_out_p2_3_ccu41_ch2: pwm_out_p2_3_ccu41_ch2 { 222 pinmux = <XMC4XXX_PINMUX_SET(2, 3, 3)>; 223 }; 224 /omit-if-no-ref/ pwm_out_p2_4_ccu41_ch1: pwm_out_p2_4_ccu41_ch1 { 225 pinmux = <XMC4XXX_PINMUX_SET(2, 4, 3)>; 226 }; 227 /omit-if-no-ref/ pwm_out_p2_5_ccu41_ch0: pwm_out_p2_5_ccu41_ch0 { 228 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 3)>; 229 }; 230 /omit-if-no-ref/ pwm_out_p3_0_ccu42_ch0: pwm_out_p3_0_ccu42_ch0 { 231 pinmux = <XMC4XXX_PINMUX_SET(3, 0, 3)>; 232 }; 233 /omit-if-no-ref/ pwm_out_p3_3_ccu42_ch3: pwm_out_p3_3_ccu42_ch3 { 234 pinmux = <XMC4XXX_PINMUX_SET(3, 3, 3)>; 235 }; 236 /omit-if-no-ref/ pwm_out_p3_4_ccu42_ch2: pwm_out_p3_4_ccu42_ch2 { 237 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 3)>; 238 }; 239 /omit-if-no-ref/ pwm_out_p3_5_ccu42_ch1: pwm_out_p3_5_ccu42_ch1 { 240 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 3)>; 241 }; 242 /omit-if-no-ref/ pwm_out_p3_6_ccu42_ch0: pwm_out_p3_6_ccu42_ch0 { 243 pinmux = <XMC4XXX_PINMUX_SET(3, 6, 3)>; 244 }; 245 246 /omit-if-no-ref/ pwm_out_p0_0_ccu80_ch2_low: pwm_out_p0_0_ccu80_ch2_low { 247 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 3)>; 248 }; 249 /omit-if-no-ref/ pwm_out_p0_1_ccu80_ch1_low: pwm_out_p0_1_ccu80_ch1_low { 250 pinmux = <XMC4XXX_PINMUX_SET(0, 1, 3)>; 251 }; 252 /omit-if-no-ref/ pwm_out_p0_2_ccu80_ch0_low: pwm_out_p0_2_ccu80_ch0_low { 253 pinmux = <XMC4XXX_PINMUX_SET(0, 2, 3)>; 254 }; 255 /omit-if-no-ref/ pwm_out_p0_3_ccu80_ch2_high: pwm_out_p0_3_ccu80_ch2_high { 256 pinmux = <XMC4XXX_PINMUX_SET(0, 3, 3)>; 257 }; 258 /omit-if-no-ref/ pwm_out_p0_4_ccu80_ch1_high: pwm_out_p0_4_ccu80_ch1_high { 259 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 3)>; 260 }; 261 /omit-if-no-ref/ pwm_out_p0_5_ccu80_ch0_high: pwm_out_p0_5_ccu80_ch0_high { 262 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 3)>; 263 }; 264 /omit-if-no-ref/ pwm_out_p0_6_ccu80_ch3_high: pwm_out_p0_6_ccu80_ch3_high { 265 pinmux = <XMC4XXX_PINMUX_SET(0, 6, 3)>; 266 }; 267 /omit-if-no-ref/ pwm_out_p0_9_ccu80_ch1_high: pwm_out_p0_9_ccu80_ch1_high { 268 pinmux = <XMC4XXX_PINMUX_SET(0, 9, 3)>; 269 }; 270 /omit-if-no-ref/ pwm_out_p0_10_ccu80_ch0_high: pwm_out_p0_10_ccu80_ch0_high { 271 pinmux = <XMC4XXX_PINMUX_SET(0, 10, 3)>; 272 }; 273 /omit-if-no-ref/ pwm_out_p0_11_ccu80_ch3_low: pwm_out_p0_11_ccu80_ch3_low { 274 pinmux = <XMC4XXX_PINMUX_SET(0, 11, 3)>; 275 }; 276 /omit-if-no-ref/ pwm_out_p1_4_ccu80_ch3_low: pwm_out_p1_4_ccu80_ch3_low { 277 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 3)>; 278 }; 279 /omit-if-no-ref/ pwm_out_p1_4_ccu81_ch2_high: pwm_out_p1_4_ccu81_ch2_high { 280 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 4)>; 281 }; 282 /omit-if-no-ref/ pwm_out_p1_5_ccu80_ch2_low: pwm_out_p1_5_ccu80_ch2_low { 283 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 3)>; 284 }; 285 /omit-if-no-ref/ pwm_out_p1_5_ccu81_ch1_high: pwm_out_p1_5_ccu81_ch1_high { 286 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 4)>; 287 }; 288 /omit-if-no-ref/ pwm_out_p1_10_ccu81_ch2_low: pwm_out_p1_10_ccu81_ch2_low { 289 pinmux = <XMC4XXX_PINMUX_SET(1, 10, 3)>; 290 }; 291 /omit-if-no-ref/ pwm_out_p1_11_ccu81_ch1_low: pwm_out_p1_11_ccu81_ch1_low { 292 pinmux = <XMC4XXX_PINMUX_SET(1, 11, 3)>; 293 }; 294 /omit-if-no-ref/ pwm_out_p1_12_ccu81_ch0_low: pwm_out_p1_12_ccu81_ch0_low { 295 pinmux = <XMC4XXX_PINMUX_SET(1, 12, 3)>; 296 }; 297 /omit-if-no-ref/ pwm_out_p1_13_ccu81_ch2_high: pwm_out_p1_13_ccu81_ch2_high { 298 pinmux = <XMC4XXX_PINMUX_SET(1, 13, 3)>; 299 }; 300 /omit-if-no-ref/ pwm_out_p1_14_ccu81_ch1_high: pwm_out_p1_14_ccu81_ch1_high { 301 pinmux = <XMC4XXX_PINMUX_SET(1, 14, 3)>; 302 }; 303 /omit-if-no-ref/ pwm_out_p1_15_ccu81_ch0_high: pwm_out_p1_15_ccu81_ch0_high { 304 pinmux = <XMC4XXX_PINMUX_SET(1, 15, 3)>; 305 }; 306 /omit-if-no-ref/ pwm_out_p2_0_ccu81_ch2_low: pwm_out_p2_0_ccu81_ch2_low { 307 pinmux = <XMC4XXX_PINMUX_SET(2, 0, 2)>; 308 }; 309 /omit-if-no-ref/ pwm_out_p2_1_ccu81_ch1_low: pwm_out_p2_1_ccu81_ch1_low { 310 pinmux = <XMC4XXX_PINMUX_SET(2, 1, 2)>; 311 }; 312 /omit-if-no-ref/ pwm_out_p2_2_ccu81_ch0_low: pwm_out_p2_2_ccu81_ch0_low { 313 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 2)>; 314 }; 315 /omit-if-no-ref/ pwm_out_p2_6_ccu80_ch1_low: pwm_out_p2_6_ccu80_ch1_low { 316 pinmux = <XMC4XXX_PINMUX_SET(2, 6, 3)>; 317 }; 318 /omit-if-no-ref/ pwm_out_p2_7_ccu80_ch0_low: pwm_out_p2_7_ccu80_ch0_low { 319 pinmux = <XMC4XXX_PINMUX_SET(2, 7, 3)>; 320 }; 321 /omit-if-no-ref/ pwm_out_p2_8_ccu80_ch3_high: pwm_out_p2_8_ccu80_ch3_high { 322 pinmux = <XMC4XXX_PINMUX_SET(2, 8, 3)>; 323 }; 324 /omit-if-no-ref/ pwm_out_p2_9_ccu80_ch2_high: pwm_out_p2_9_ccu80_ch2_high { 325 pinmux = <XMC4XXX_PINMUX_SET(2, 9, 3)>; 326 }; 327 /omit-if-no-ref/ pwm_out_p2_14_ccu80_ch2_low: pwm_out_p2_14_ccu80_ch2_low { 328 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 3)>; 329 }; 330 /omit-if-no-ref/ pwm_out_p2_15_ccu80_ch1_low: pwm_out_p2_15_ccu80_ch1_low { 331 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 3)>; 332 }; 333 /omit-if-no-ref/ pwm_out_p5_0_ccu81_ch3_low: pwm_out_p5_0_ccu81_ch3_low { 334 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 3)>; 335 }; 336 /omit-if-no-ref/ pwm_out_p5_1_ccu81_ch3_high: pwm_out_p5_1_ccu81_ch3_high { 337 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 3)>; 338 }; 339 /omit-if-no-ref/ pwm_out_p5_2_ccu81_ch2_low: pwm_out_p5_2_ccu81_ch2_low { 340 pinmux = <XMC4XXX_PINMUX_SET(5, 2, 3)>; 341 }; 342 /omit-if-no-ref/ pwm_out_p5_7_ccu81_ch0_high: pwm_out_p5_7_ccu81_ch0_high { 343 pinmux = <XMC4XXX_PINMUX_SET(5, 7, 3)>; 344 }; 345 /omit-if-no-ref/ i2c_sda_p0_5_u1c0: i2c_sda_p0_5_u1c0 { 346 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 2)>; /* USIC sda-src = DX0B */ 347 }; 348 /omit-if-no-ref/ i2c_sda_p3_5_u0c1: i2c_sda_p3_5_u0c1 { 349 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 4)>; /* USIC sda-src = DX0A */ 350 }; 351 /omit-if-no-ref/ i2c_sda_p5_1_u0c0: i2c_sda_p5_1_u0c0 { 352 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 1)>; /* USIC sda-src = DX0A */ 353 }; 354 /omit-if-no-ref/ i2c_sda_p1_5_u0c0: i2c_sda_p1_5_u0c0 { 355 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 2)>; /* USIC sda-src = DX0A */ 356 }; 357 /omit-if-no-ref/ i2c_sda_p2_14_u1c0: i2c_sda_p2_14_u1c0 { 358 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 2)>; /* USIC sda-src = DX0D */ 359 }; 360 /omit-if-no-ref/ i2c_sda_p2_5_u0c1: i2c_sda_p2_5_u0c1 { 361 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 2)>; /* USIC sda-src = DX0B */ 362 }; 363 /omit-if-no-ref/ i2c_sda_p5_0_u2c0: i2c_sda_p5_0_u2c0 { 364 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 1)>; /* USIC sda-src = DX0B */ 365 }; 366 367 /omit-if-no-ref/ i2c_scl_p2_4_u0c1: i2c_scl_p2_4_u0c1 { 368 pinmux = <XMC4XXX_PINMUX_SET(2, 4, 2)>; /* USIC scl-src = DX1A */ 369 }; 370 /omit-if-no-ref/ i2c_scl_p0_11_u1c0: i2c_scl_p0_11_u1c0 { 371 pinmux = <XMC4XXX_PINMUX_SET(0, 11, 2)>; /* USIC scl-src = DX1A */ 372 }; 373 /omit-if-no-ref/ i2c_scl_p5_2_u2c0: i2c_scl_p5_2_u2c0 { 374 pinmux = <XMC4XXX_PINMUX_SET(5, 2, 1)>; /* USIC scl-src = DX1A */ 375 }; 376 /omit-if-no-ref/ i2c_scl_p3_6_u0c1: i2c_scl_p3_6_u0c1 { 377 pinmux = <XMC4XXX_PINMUX_SET(3, 6, 4)>; /* USIC scl-src = DX1B */ 378 }; 379 /omit-if-no-ref/ i2c_scl_p1_1_u0c0: i2c_scl_p1_1_u0c0 { 380 pinmux = <XMC4XXX_PINMUX_SET(1, 1, 2)>; /* USIC scl-src = DX1A */ 381 }; 382 /omit-if-no-ref/ i2c_scl_p3_0_u0c1: i2c_scl_p3_0_u0c1 { 383 pinmux = <XMC4XXX_PINMUX_SET(3, 0, 2)>; /* USIC scl-src = DX1B */ 384 }; 385 /omit-if-no-ref/ i2c_scl_p0_10_u1c1: i2c_scl_p0_10_u1c1 { 386 pinmux = <XMC4XXX_PINMUX_SET(0, 10, 2)>; /* USIC scl-src = DX1A */ 387 }; 388 /omit-if-no-ref/ i2c_scl_p0_8_u0c0: i2c_scl_p0_8_u0c0 { 389 pinmux = <XMC4XXX_PINMUX_SET(0, 8, 2)>; /* USIC scl-src = DX1B */ 390 }; 391 392 /omit-if-no-ref/ i2c_sda_dx0_p0_4_u1c0: i2c_sda_dx0_p0_4_u1c0 { 393 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 0)>; /* USIC sda-src = DX0A */ 394 }; 395 /omit-if-no-ref/ i2c_sda_dx0_p3_4_u2c1: i2c_sda_dx0_p3_4_u2c1 { 396 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 0)>; /* USIC sda-src = DX0B */ 397 }; 398 /omit-if-no-ref/ i2c_sda_dx0_p0_0_u1c1: i2c_sda_dx0_p0_0_u1c1 { 399 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; /* USIC sda-src = DX0D */ 400 }; 401 /omit-if-no-ref/ i2c_sda_dx0_p4_0_u2c1: i2c_sda_dx0_p4_0_u2c1 { 402 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC sda-src = DX0C */ 403 }; 404 /omit-if-no-ref/ i2c_sda_dx0_p2_15_u1c0: i2c_sda_dx0_p2_15_u1c0 { 405 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; /* USIC sda-src = DX0C */ 406 }; 407 /omit-if-no-ref/ i2c_sda_dx0_p1_4_u0c0: i2c_sda_dx0_p1_4_u0c0 { 408 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* USIC sda-src = DX0B */ 409 }; 410 /omit-if-no-ref/ i2c_sda_dx0_p2_2_u0c1: i2c_sda_dx0_p2_2_u0c1 { 411 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; /* USIC sda-src = DX0A */ 412 }; 413 /omit-if-no-ref/ i2c_sda_dout0_p0_1_u1c1: i2c_sda_dout0_p0_1_u1c1 { 414 pinmux = <XMC4XXX_PINMUX_SET(0, 1, 2)>; 415 }; 416 /omit-if-no-ref/ i2c_sda_dout0_p1_7_u0c0: i2c_sda_dout0_p1_7_u0c0 { 417 pinmux = <XMC4XXX_PINMUX_SET(1, 7, 2)>; 418 }; 419 /omit-if-no-ref/ i2c_scl_dx1_p4_0_u1c1: i2c_scl_dx1_p4_0_u1c1 { 420 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC scl-src = DX1C */ 421 }; 422 /omit-if-no-ref/ i2c_scl_dout1_p1_6_u0c0: i2c_scl_dout1_p1_6_u0c0 { 423 pinmux = <XMC4XXX_PINMUX_SET(1, 6, 2)>; 424 }; 425 /omit-if-no-ref/ i2c_scl_dout1_p1_10_u0c0: i2c_scl_dout1_p1_10_u0c0 { 426 pinmux = <XMC4XXX_PINMUX_SET(1, 10, 2)>; 427 }; 428 429 /omit-if-no-ref/ eth_p0_9_mdo: ebu_p0_9_mdo { 430 pinmux = <XMC4XXX_PINMUX_SET(0, 9, 0)>; 431 hwctrl = "periph1"; 432 }; 433 /omit-if-no-ref/ eth_p1_11_mdo: ebu_p1_11_mdo { 434 pinmux = <XMC4XXX_PINMUX_SET(1, 11, 0)>; 435 hwctrl = "periph1"; 436 }; 437 /omit-if-no-ref/ eth_p2_0_mdo: ebu_p2_0_mdo { 438 pinmux = <XMC4XXX_PINMUX_SET(2, 0, 0)>; 439 hwctrl = "periph1"; 440 }; 441 442 /omit-if-no-ref/ eth_p0_9_mdio: eth_p0_9_mdio { 443 pinmux = <XMC4XXX_PINMUX_SET(0, 9, 0)>; 444 }; 445 /omit-if-no-ref/ eth_p2_0_mdio: eth_p2_0_mdio { 446 pinmux = <XMC4XXX_PINMUX_SET(2, 0, 0)>; 447 }; 448 /omit-if-no-ref/ eth_p1_11_mdio: eth_p1_11_mdio { 449 pinmux = <XMC4XXX_PINMUX_SET(1, 11, 0)>; 450 }; 451 452 /omit-if-no-ref/ eth_p0_4_tx_en: eth_p0_4_tx_en { 453 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 1)>; 454 }; 455 /omit-if-no-ref/ eth_p0_5_txd0: eth_p0_5_txd0 { 456 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 1)>; 457 }; 458 /omit-if-no-ref/ eth_p0_6_txd1: eth_p0_6_txd1 { 459 pinmux = <XMC4XXX_PINMUX_SET(0, 6, 1)>; 460 }; 461 /omit-if-no-ref/ eth_p0_10_mdc: eth_p0_10_mdc { 462 pinmux = <XMC4XXX_PINMUX_SET(0, 10, 1)>; 463 }; 464 /omit-if-no-ref/ eth_p1_10_mdc: eth_p1_10_mdc { 465 pinmux = <XMC4XXX_PINMUX_SET(1, 10, 1)>; 466 }; 467 /omit-if-no-ref/ eth_p1_12_tx_en: eth_p1_12_tx_en { 468 pinmux = <XMC4XXX_PINMUX_SET(1, 12, 1)>; 469 }; 470 /omit-if-no-ref/ eth_p1_13_txd0: eth_p1_13_txd0 { 471 pinmux = <XMC4XXX_PINMUX_SET(1, 13, 1)>; 472 }; 473 /omit-if-no-ref/ eth_p1_14_txd1: eth_p1_14_txd1 { 474 pinmux = <XMC4XXX_PINMUX_SET(1, 14, 1)>; 475 }; 476 /omit-if-no-ref/ eth_p2_5_tx_en: eth_p2_5_tx_en { 477 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 1)>; 478 }; 479 /omit-if-no-ref/ eth_p2_7_mdc: eth_p2_7_mdc { 480 pinmux = <XMC4XXX_PINMUX_SET(2, 7, 1)>; 481 }; 482 /omit-if-no-ref/ eth_p2_8_txd0: eth_p2_8_txd0 { 483 pinmux = <XMC4XXX_PINMUX_SET(2, 8, 1)>; 484 }; 485 /omit-if-no-ref/ eth_p2_9_txd1: eth_p2_9_txd1 { 486 pinmux = <XMC4XXX_PINMUX_SET(2, 9, 1)>; 487 }; 488 489 /omit-if-no-ref/ eth_p2_2_rxd0: eth_p2_2_rxd0 { 490 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; 491 }; 492 /omit-if-no-ref/ eth_p0_2_rxd0: eth_p0_2_rxd0 { 493 pinmux = <XMC4XXX_PINMUX_SET(0, 2, 0)>; 494 }; 495 /omit-if-no-ref/ eth_p14_8_rxd0: eth_p14_8_rxd0 { 496 pinmux = <XMC4XXX_PINMUX_SET(14, 8, 0)>; 497 }; 498 /omit-if-no-ref/ eth_p5_0_rxd0: eth_p5_0_rxd0 { 499 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; 500 }; 501 /omit-if-no-ref/ eth_p2_3_rxd1: eth_p2_3_rxd1 { 502 pinmux = <XMC4XXX_PINMUX_SET(2, 3, 0)>; 503 }; 504 /omit-if-no-ref/ eth_p0_3_rxd1: eth_p0_3_rxd1 { 505 pinmux = <XMC4XXX_PINMUX_SET(0, 3, 0)>; 506 }; 507 /omit-if-no-ref/ eth_p14_9_rxd1: eth_p14_9_rxd1 { 508 pinmux = <XMC4XXX_PINMUX_SET(14, 9, 0)>; 509 }; 510 /omit-if-no-ref/ eth_p5_1_rxd1: eth_p5_1_rxd1 { 511 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 0)>; 512 }; 513 /omit-if-no-ref/ eth_p5_8_rxd2: eth_p5_8_rxd2 { 514 pinmux = <XMC4XXX_PINMUX_SET(5, 8, 0)>; 515 }; 516 /omit-if-no-ref/ eth_p6_4_rxd2: eth_p6_4_rxd2 { 517 pinmux = <XMC4XXX_PINMUX_SET(6, 4, 0)>; 518 }; 519 /omit-if-no-ref/ eth_p5_9_rxd3: eth_p5_9_rxd3 { 520 pinmux = <XMC4XXX_PINMUX_SET(5, 9, 0)>; 521 }; 522 /omit-if-no-ref/ eth_p6_3_rxd3: eth_p6_3_rxd3 { 523 pinmux = <XMC4XXX_PINMUX_SET(6, 3, 0)>; 524 }; 525 /omit-if-no-ref/ eth_p2_1_clk_rmii: eth_p2_1_clk_rmii { 526 pinmux = <XMC4XXX_PINMUX_SET(2, 1, 0)>; 527 }; 528 /omit-if-no-ref/ eth_p0_0_clk_rmii: eth_p0_0_clk_rmii { 529 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; 530 }; 531 /omit-if-no-ref/ eth_p15_8_clk_rmii: eth_p15_8_clk_rmii { 532 pinmux = <XMC4XXX_PINMUX_SET(15, 8, 0)>; 533 }; 534 /omit-if-no-ref/ eth_p6_5_clk_rmii: eth_p6_5_clk_rmii { 535 pinmux = <XMC4XXX_PINMUX_SET(6, 5, 0)>; 536 }; 537 /omit-if-no-ref/ eth_p2_5_crs_dv: eth_p2_5_crs_dv { 538 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 0)>; 539 }; 540 /omit-if-no-ref/ eth_p0_1_crs_dv: eth_p0_1_crs_dv { 541 pinmux = <XMC4XXX_PINMUX_SET(0, 1, 0)>; 542 }; 543 /omit-if-no-ref/ eth_p15_9_crs_dv: eth_p15_9_crs_dv { 544 pinmux = <XMC4XXX_PINMUX_SET(15, 9, 0)>; 545 }; 546 /omit-if-no-ref/ eth_p5_2_crs_dv: eth_p5_2_crs_dv { 547 pinmux = <XMC4XXX_PINMUX_SET(5, 2, 0)>; 548 }; 549 /omit-if-no-ref/ eth_p5_11_crs: eth_p5_11_crs { 550 pinmux = <XMC4XXX_PINMUX_SET(5, 11, 0)>; 551 }; 552 /omit-if-no-ref/ eth_p5_4_crs: eth_p5_4_crs { 553 pinmux = <XMC4XXX_PINMUX_SET(5, 4, 0)>; 554 }; 555 /omit-if-no-ref/ eth_p2_4_rxer: eth_p2_4_rxer { 556 pinmux = <XMC4XXX_PINMUX_SET(2, 4, 0)>; 557 }; 558 /omit-if-no-ref/ eth_p0_11_rxer: eth_p0_11_rxer { 559 pinmux = <XMC4XXX_PINMUX_SET(0, 11, 0)>; 560 }; 561 /omit-if-no-ref/ eth_p5_3_rxer: eth_p5_3_rxer { 562 pinmux = <XMC4XXX_PINMUX_SET(5, 3, 0)>; 563 }; 564 /omit-if-no-ref/ eth_p2_15_col: eth_p2_15_col { 565 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; 566 }; 567 /omit-if-no-ref/ eth_p5_5_col: eth_p5_5_col { 568 pinmux = <XMC4XXX_PINMUX_SET(5, 5, 0)>; 569 }; 570 /omit-if-no-ref/ eth_p5_10_clk_tx: eth_p5_10_clk_tx { 571 pinmux = <XMC4XXX_PINMUX_SET(5, 10, 0)>; 572 }; 573 /omit-if-no-ref/ eth_p6_6_clk_tx: eth_p6_6_clk_tx { 574 pinmux = <XMC4XXX_PINMUX_SET(6, 6, 0)>; 575 }; 576 577 /omit-if-no-ref/ can_tx_p0_0_node0: can_tx_p0_0_node0 { 578 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 2)>; 579 }; 580 /omit-if-no-ref/ can_tx_p1_4_node0: can_tx_p1_4_node0 { 581 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 2)>; 582 }; 583 /omit-if-no-ref/ can_tx_p1_5_node1: can_tx_p1_5_node1 { 584 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 1)>; 585 }; 586 /omit-if-no-ref/ can_tx_p1_9_node2: can_tx_p1_9_node2 { 587 pinmux = <XMC4XXX_PINMUX_SET(1, 9, 2)>; 588 }; 589 /omit-if-no-ref/ can_tx_p1_12_node1: can_tx_p1_12_node1 { 590 pinmux = <XMC4XXX_PINMUX_SET(1, 12, 2)>; 591 }; 592 /omit-if-no-ref/ can_tx_p2_7_node1: can_tx_p2_7_node1 { 593 pinmux = <XMC4XXX_PINMUX_SET(2, 7, 2)>; 594 }; 595 /omit-if-no-ref/ can_tx_p3_2_node0: can_tx_p3_2_node0 { 596 pinmux = <XMC4XXX_PINMUX_SET(3, 2, 2)>; 597 }; 598 599 /omit-if-no-ref/ can_rx_p1_5_node0: can_rx_p1_5_node0 { 600 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 0)>; /* CAN input src = RXDA */ 601 }; 602 /omit-if-no-ref/ can_rx_p14_3_node0: can_rx_p14_3_node0 { 603 pinmux = <XMC4XXX_PINMUX_SET(14, 3, 0)>; /* CAN input src = RXDB */ 604 }; 605 /omit-if-no-ref/ can_rx_p2_6_node1: can_rx_p2_6_node1 { 606 pinmux = <XMC4XXX_PINMUX_SET(2, 6, 0)>; /* CAN input src = RXDA */ 607 }; 608 /omit-if-no-ref/ can_rx_p1_13_node1: can_rx_p1_13_node1 { 609 pinmux = <XMC4XXX_PINMUX_SET(1, 13, 0)>; /* CAN input src = RXDC */ 610 }; 611 /omit-if-no-ref/ can_rx_p1_4_node1: can_rx_p1_4_node1 { 612 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* CAN input src = RXDD */ 613 }; 614 /omit-if-no-ref/ can_rx_p1_8_node2: can_rx_p1_8_node2 { 615 pinmux = <XMC4XXX_PINMUX_SET(1, 8, 0)>; /* CAN input src = RXDA */ 616 }; 617}; 618
