1/*
2 * Copyright (c) 2019 Benjamin Valentin
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <atmel/samd2x.dtsi>
8
9/ {
10	aliases {
11		port-c = &portc;
12	};
13
14	soc {
15		usb0: usb@41005000 {
16			compatible = "atmel,sam0-usb";
17			status = "disabled";
18			reg = <0x41005000 0x1000>;
19			interrupts = <7 0>;
20			num-bidir-endpoints = <8>;
21		};
22
23		dmac: dmac@41004800 {
24			compatible = "atmel,sam0-dmac";
25			reg = <0x41004800 0x50>;
26			interrupts = <6 0>;
27			#dma-cells = <2>;
28		};
29
30		pinctrl: pinctrl@41004400 {
31			ranges = <0x41004400 0x41004400 0x180>;
32
33			portc: gpio@41004500 {
34				compatible = "atmel,sam0-gpio";
35				reg = <0x41004500 0x80>;
36				gpio-controller;
37				#gpio-cells = <2>;
38				#atmel,pin-cells = <2>;
39			};
40		};
41
42		pinmux_c: pinmux@41004500 {
43			compatible = "atmel,sam0-pinmux";
44			reg = <0x41004500 0x80>;
45		};
46
47		tcc0: tcc@42002000 {
48			compatible = "atmel,sam0-tcc";
49			reg = <0x42002000 0x80>;
50			interrupts = <15 0>;
51			clocks = <&gclk 26>, <&pm 0x20 8>;
52			clock-names = "GCLK", "PM";
53
54			channels = <4>;
55			counter-size = <24>;
56		};
57
58		tcc1: tcc@42002400 {
59			compatible = "atmel,sam0-tcc";
60			reg = <0x42002400 0x80>;
61			interrupts = <16 0>;
62			clocks = <&gclk 26>, <&pm 0x20 9>;
63			clock-names = "GCLK", "PM";
64
65			channels = <2>;
66			counter-size = <24>;
67		};
68
69		tcc2: tcc@42002800 {
70			compatible = "atmel,sam0-tcc";
71			reg = <0x42002800 0x80>;
72			interrupts = <17 0>;
73			clocks = <&gclk 27>, <&pm 0x20 10>;
74			clock-names = "GCLK", "PM";
75
76			channels = <2>;
77			counter-size = <16>;
78		};
79	};
80};
81
82&sercom0 {
83	interrupts = <9 0>;
84	clocks = <&gclk 0x14>, <&pm 0x20 2>;
85	clock-names = "GCLK", "PM";
86};
87
88&sercom1 {
89	interrupts = <10 0>;
90	clocks = <&gclk 0x15>, <&pm 0x20 3>;
91	clock-names = "GCLK", "PM";
92};
93
94&sercom2 {
95	interrupts = <11 0>;
96	clocks = <&gclk 0x16>, <&pm 0x20 4>;
97	clock-names = "GCLK", "PM";
98};
99
100&sercom3 {
101	interrupts = <12 0>;
102	clocks = <&gclk 0x17>, <&pm 0x20 5>;
103	clock-names = "GCLK", "PM";
104};
105
106&sercom4 {
107	interrupts = <13 0>;
108	clocks = <&gclk 0x18>, <&pm 0x20 6>;
109	clock-names = "GCLK", "PM";
110};
111
112&sercom5 {
113	interrupts = <14 0>;
114	clocks = <&gclk 0x19>, <&pm 0x20 7>;
115	clock-names = "GCLK", "PM";
116};
117
118&tc4 {
119	interrupts = <19 0>;
120	clocks = <&gclk 0x1c>, <&pm 0x20 12>;
121	clock-names = "GCLK", "PM";
122};
123
124&adc {
125	clocks = <&gclk 0x1e>, <&pm 0x20 16>;
126	clock-names = "GCLK", "PM";
127	interrupts = <23 0>;
128	interrupt-names = "resrdy";
129};
130