1 /*
2  * Copyright (c) 2021 Telink Semiconductor
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_B91_H_
8 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_B91_H_
9 
10 /* Timeouts */
11 #define B91_TX_WAIT_TIME_MS                 (10)
12 #define B91_ACK_WAIT_TIME_MS                (10)
13 
14 /* Received data parsing */
15 #define B91_PAYLOAD_OFFSET                  (5)
16 #define B91_PAYLOAD_MIN                     (5)
17 #define B91_PAYLOAD_MAX                     (127)
18 #define B91_FRAME_TYPE_OFFSET               (0)
19 #define B91_FRAME_TYPE_MASK                 (0x07)
20 #define B91_DEST_ADDR_TYPE_OFFSET           (1)
21 #define B91_DEST_ADDR_TYPE_MASK             (0x0c)
22 #define B91_DEST_ADDR_TYPE_SHORT            (8)
23 #define B91_DEST_ADDR_TYPE_IEEE             (0x0c)
24 #define B91_PAN_ID_OFFSET                   (3)
25 #define B91_PAN_ID_SIZE                     (2)
26 #define B91_DEST_ADDR_OFFSET                (5)
27 #define B91_SHORT_ADDRESS_SIZE              (2)
28 #define B91_IEEE_ADDRESS_SIZE               (8)
29 #define B91_LENGTH_OFFSET                   (4)
30 #define B91_RSSI_OFFSET                     (11)
31 #define B91_BROADCAST_ADDRESS               ((uint8_t [2]) { 0xff, 0xff })
32 #define B91_ACK_FRAME_LEN                   (3)
33 #define B91_ACK_TYPE                        (2)
34 #define B91_ACK_REQUEST                     (1 << 5)
35 #define B91_DSN_OFFSET                      (2)
36 #define B91_FCS_LENGTH                      (2)
37 
38 /* Generic */
39 #define B91_TRX_LENGTH                      (256)
40 #define B91_RSSI_TO_LQI_SCALE               (3)
41 #define B91_RSSI_TO_LQI_MIN                 (-87)
42 #define B91_CCA_TIME_MAX_US                 (200)
43 #define B91_LOGIC_CHANNEL_TO_PHYSICAL(p)    (((p) - 10) * 5)
44 
45 /* TX power lookup table */
46 #define B91_TX_POWER_MIN                    (-30)
47 #define B91_TX_POWER_MAX                    (9)
48 static const uint8_t b91_tx_pwr_lt[] = {
49 	RF_POWER_N30dBm,        /* -30.0 dBm: -30 */
50 	RF_POWER_N30dBm,        /* -30.0 dBm: -29 */
51 	RF_POWER_N30dBm,        /* -30.0 dBm: -28 */
52 	RF_POWER_N30dBm,        /* -30.0 dBm: -27 */
53 	RF_POWER_N30dBm,        /* -30.0 dBm: -26 */
54 	RF_POWER_N23p54dBm,     /* -23.5 dBm: -25 */
55 	RF_POWER_N23p54dBm,     /* -23.5 dBm: -24 */
56 	RF_POWER_N23p54dBm,     /* -23.5 dBm: -23 */
57 	RF_POWER_N23p54dBm,     /* -23.5 dBm: -22 */
58 	RF_POWER_N23p54dBm,     /* -23.5 dBm: -21 */
59 	RF_POWER_N17p83dBm,     /* -17.8 dBm: -20 */
60 	RF_POWER_N17p83dBm,     /* -17.8 dBm: -19 */
61 	RF_POWER_N17p83dBm,     /* -17.8 dBm: -18 */
62 	RF_POWER_N17p83dBm,     /* -17.8 dBm: -17 */
63 	RF_POWER_N17p83dBm,     /* -17.8 dBm: -16 */
64 	RF_POWER_N12p06dBm,     /* -12.0 dBm: -15 */
65 	RF_POWER_N12p06dBm,     /* -12.0 dBm: -14 */
66 	RF_POWER_N12p06dBm,     /* -12.0 dBm: -13 */
67 	RF_POWER_N12p06dBm,     /* -12.0 dBm: -12 */
68 	RF_POWER_N12p06dBm,     /* -12.0 dBm: -11 */
69 	RF_POWER_N8p78dBm,      /*  -8.7 dBm: -10 */
70 	RF_POWER_N8p78dBm,      /*  -8.7 dBm:  -9 */
71 	RF_POWER_N8p78dBm,      /*  -8.7 dBm:  -8 */
72 	RF_POWER_N6p54dBm,      /*  -6.5 dBm:  -7 */
73 	RF_POWER_N6p54dBm,      /*  -6.5 dBm:  -6 */
74 	RF_POWER_N4p77dBm,      /*  -4.7 dBm:  -5 */
75 	RF_POWER_N4p77dBm,      /*  -4.7 dBm:  -4 */
76 	RF_POWER_N3p37dBm,      /*  -3.3 dBm:  -3 */
77 	RF_POWER_N2p01dBm,      /*  -2.0 dBm:  -2 */
78 	RF_POWER_N1p37dBm,      /*  -1.3 dBm:  -1 */
79 	RF_POWER_P0p01dBm,      /*   0.0 dBm:   0 */
80 	RF_POWER_P0p80dBm,      /*   0.8 dBm:   1 */
81 	RF_POWER_P2p32dBm,      /*   2.3 dBm:   2 */
82 	RF_POWER_P3p25dBm,      /*   3.2 dBm:   3 */
83 	RF_POWER_P4p35dBm,      /*   4.3 dBm:   4 */
84 	RF_POWER_P5p68dBm,      /*   5.6 dBm:   5 */
85 	RF_POWER_P5p68dBm,      /*   5.6 dBm:   6 */
86 	RF_POWER_P6p98dBm,      /*   6.9 dBm:   7 */
87 	RF_POWER_P8p05dBm,      /*   8.0 dBm:   8 */
88 	RF_POWER_P9p11dBm,      /*   9.1 dBm:   9 */
89 };
90 
91 /* data structure */
92 struct b91_data {
93 	uint8_t mac_addr[B91_IEEE_ADDRESS_SIZE];
94 	uint8_t rx_buffer[B91_TRX_LENGTH];
95 	uint8_t tx_buffer[B91_TRX_LENGTH];
96 	struct net_if *iface;
97 	struct k_sem tx_wait;
98 	struct k_sem ack_wait;
99 	uint8_t filter_pan_id[B91_PAN_ID_SIZE];
100 	uint8_t filter_short_addr[B91_SHORT_ADDRESS_SIZE];
101 	uint8_t filter_ieee_addr[B91_IEEE_ADDRESS_SIZE];
102 	bool is_started;
103 	bool ack_handler_en;
104 	uint16_t current_channel;
105 };
106 
107 #endif
108