1# SPDX-License-Identifier: Apache-2.0
2# Copyright (C) 2022, Intel Corporation
3# Description:
4# Cyclone V ethernet configuration options
5
6menuconfig ETH_CYCLONEV
7	bool "Cyclone V ethernet MAC driver"
8	default y
9	depends on DT_HAS_SNPS_ETHERNET_CYCLONEV_ENABLED
10
11if ETH_CYCLONEV
12
13config ETH_CVSX_NB_TX_DESCS
14	int "Number of entries in the transmit descriptor ring"
15	default 32
16	range 4 128
17	help
18	  A higher number allows for more packets to be queued which may
19	  improve throughput, but that requires more transient memory.
20	  However there must be enough descriptors to hold all fragments
21	  of a full-size packet to be transmitted or the packet will be
22	  dropped.
23
24	  Fragment size is influenced by CONFIG_NET_BUF_DATA_SIZE.
25
26config ETH_CVSX_NB_RX_DESCS
27	int "Number of entries in the receive descriptor ring"
28	default 32
29	range 4 128
30	help
31	  Received packets are spread across the required number of fragment
32	  buffers. Each RX fragment has a size of CONFIG_NET_BUF_DATA_SIZE.
33	  There is one descriptor entry per fragment.
34
35endif # ETH_CYCLONEV
36