1# STM32 LTDC display driver configuration options
2
3# Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com>
4# SPDX-License-Identifier: Apache-2.0
5
6menuconfig STM32_LTDC
7	bool "STM32 LCD-TFT display controller driver"
8	default y
9	depends on DT_HAS_ST_STM32_LTDC_ENABLED
10	select USE_STM32_HAL_LTDC
11	select CACHE_MANAGEMENT if CPU_HAS_DCACHE
12	help
13	  Enable driver for STM32 LCT-TFT display controller periheral.
14
15if STM32_LTDC
16
17choice STM32_LTDC_PIXEL_FORMAT
18	prompt "Color pixel format"
19	default STM32_LTDC_RGB565
20	depends on STM32_LTDC
21	help
22	  Specify the color pixel format for the STM32 LCD-TFT display controller.
23
24config STM32_LTDC_ARGB8888
25	bool "ARGB8888"
26	help
27	  One pixel consists of 8-bit alpha, 8-bit red, 8-bit green and 8-bit blue value
28	  (4 bytes per pixel)
29
30config STM32_LTDC_RGB888
31	bool "RGB888"
32	help
33	  One pixel consists of 8-bit red, 8-bit green and 8-bit blue value
34	  (3 bytes per pixel)
35
36config STM32_LTDC_RGB565
37	bool "RGB565"
38	help
39	  One pixel consists of 5-bit red, 6-bit green and 5-bit blue value
40	  (2 bytes per pixel)
41
42endchoice
43
44config STM32_LTDC_FB_NUM
45	int "Frame buffer number"
46	default 1
47	range 0 2
48	help
49	  STM32 LTDC frame buffer number config:
50	    - 0 frame buffer maintained by application, must write with full screen pixels.
51	    - 1 single frame buffer in stm32 ltdc driver.
52	    - 2 double frame buffer in stm32 ltdc driver.
53
54config STM32_LTDC_DISABLE_FMC_BANK1
55	bool "Disable FMC bank1 for STM32F7/H7 series"
56	depends on SOC_SERIES_STM32H7X || SOC_SERIES_STM32F7X
57	default y
58	help
59	  Disable FMC bank1 if not used to prevent speculative read accesses.
60	  Refer to AN4861 "4.6 Special recommendations for Cortex-M7 (STM32F7/H7)".
61
62endif # STM32_LTDC
63