1 /*
2 * Copyright (c) 2021 Google Inc
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT ite_it8xxx2_bbram
8
9 #include <errno.h>
10
11 #include <zephyr/drivers/bbram.h>
12 #include <zephyr/logging/log.h>
13 #include <zephyr/sys/util.h>
14
15 #ifndef CONFIG_BBRAM_IT8XXX2_EMUL
16 #include <chip_chipregs.h>
17 #else
18 /* Emulation register values */
19 enum bram_indices {
20 BRAM_IDX_VALID_FLAGS0,
21 BRAM_IDX_VALID_FLAGS1,
22 BRAM_IDX_VALID_FLAGS2,
23 BRAM_IDX_VALID_FLAGS3,
24 };
25 #endif
26
27 #include "it8xxx2.h"
28
29 LOG_MODULE_REGISTER(it8xxx2_bbram, CONFIG_BBRAM_LOG_LEVEL);
30
31 #define BRAM_VALID_MAGIC 0x4252414D /* "BRAM" */
32 #define BRAM_VALID_MAGIC_FIELD0 (BRAM_VALID_MAGIC & 0xff)
33 #define BRAM_VALID_MAGIC_FIELD1 ((BRAM_VALID_MAGIC >> 8) & 0xff)
34 #define BRAM_VALID_MAGIC_FIELD2 ((BRAM_VALID_MAGIC >> 16) & 0xff)
35 #define BRAM_VALID_MAGIC_FIELD3 ((BRAM_VALID_MAGIC >> 24) & 0xff)
36
bbram_it8xxx2_read(const struct device * dev,size_t offset,size_t size,uint8_t * data)37 static int bbram_it8xxx2_read(const struct device *dev, size_t offset, size_t size, uint8_t *data)
38 {
39 const struct bbram_it8xxx2_config *config = dev->config;
40
41 if (size < 1 || offset + size > config->size) {
42 return -EINVAL;
43 }
44
45 bytecpy(data, ((uint8_t *)config->base_addr + offset), size);
46 return 0;
47 }
48
bbram_it8xxx2_write(const struct device * dev,size_t offset,size_t size,const uint8_t * data)49 static int bbram_it8xxx2_write(const struct device *dev, size_t offset, size_t size,
50 const uint8_t *data)
51 {
52 const struct bbram_it8xxx2_config *config = dev->config;
53
54 if (size < 1 || offset + size > config->size) {
55 return -EINVAL;
56 }
57
58 bytecpy(((uint8_t *)config->base_addr + offset), data, size);
59 return 0;
60 }
61
bbram_it8xxx2_size(const struct device * dev,size_t * size)62 static int bbram_it8xxx2_size(const struct device *dev, size_t *size)
63 {
64 const struct bbram_it8xxx2_config *config = dev->config;
65
66 *size = config->size;
67 return 0;
68 }
69
70 static const struct bbram_driver_api bbram_it8xxx2_driver_api = {
71 .read = bbram_it8xxx2_read,
72 .write = bbram_it8xxx2_write,
73 .get_size = bbram_it8xxx2_size,
74 };
75
bbram_it8xxx2_init(const struct device * dev)76 static int bbram_it8xxx2_init(const struct device *dev)
77 {
78 const struct bbram_it8xxx2_config *config = dev->config;
79 uint8_t *base_addr = (uint8_t *)config->base_addr;
80 uint8_t *bram_valid_flag0 = base_addr + BRAM_IDX_VALID_FLAGS0;
81 uint8_t *bram_valid_flag1 = base_addr + BRAM_IDX_VALID_FLAGS1;
82 uint8_t *bram_valid_flag2 = base_addr + BRAM_IDX_VALID_FLAGS2;
83 uint8_t *bram_valid_flag3 = base_addr + BRAM_IDX_VALID_FLAGS3;
84 int size = config->size;
85
86 if ((*bram_valid_flag0 != BRAM_VALID_MAGIC_FIELD0) ||
87 (*bram_valid_flag1 != BRAM_VALID_MAGIC_FIELD1) ||
88 (*bram_valid_flag2 != BRAM_VALID_MAGIC_FIELD2) ||
89 (*bram_valid_flag3 != BRAM_VALID_MAGIC_FIELD3)) {
90 /*
91 * Magic does not match, so BRAM must be uninitialized. Clear
92 * entire Bank0 and Bank1 BRAM, and set magic value.
93 */
94 for (int i = 0; i < size; i++) {
95 *(base_addr + i) = 0;
96 }
97
98 *bram_valid_flag0 = BRAM_VALID_MAGIC_FIELD0;
99 *bram_valid_flag1 = BRAM_VALID_MAGIC_FIELD1;
100 *bram_valid_flag2 = BRAM_VALID_MAGIC_FIELD2;
101 *bram_valid_flag3 = BRAM_VALID_MAGIC_FIELD3;
102 }
103
104 return 0;
105 }
106
107 #define BBRAM_INIT(inst) \
108 BBRAM_IT8XXX2_DECL_CONFIG(inst); \
109 DEVICE_DT_INST_DEFINE(inst, bbram_it8xxx2_init, NULL, NULL, &bbram_cfg_##inst, \
110 PRE_KERNEL_1, CONFIG_BBRAM_INIT_PRIORITY, \
111 &bbram_it8xxx2_driver_api);
112
113 DT_INST_FOREACH_STATUS_OKAY(BBRAM_INIT);
114
