1/*
2 * Copyright (c) 2023-2024 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/u5/stm32u5a9Xj.dtsi>
9#include <st/u5/stm32u5a9njhxq-pinctrl.dtsi>
10#include <zephyr/dt-bindings/input/input-event-codes.h>
11
12/ {
13	model = "STMicroelectronics STM32U5A9J DISCOVERY KIT board";
14	compatible = "st,stm32u5a9j-dk";
15
16	chosen {
17		zephyr,console = &usart1;
18		zephyr,shell-uart = &usart1;
19		zephyr,sram = &sram0;
20		zephyr,flash = &flash0;
21		zephyr,code-partition = &slot0_partition;
22	};
23
24	leds {
25		compatible = "gpio-leds";
26		green_led_0: led_3 {
27			gpios = <&gpioe 0 GPIO_ACTIVE_HIGH>;
28			label = "User LD3";
29		};
30		red_led_0: led_4 {
31			gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
32			label = "User LD4";
33		};
34	};
35
36	gpio_keys {
37		compatible = "gpio-keys";
38		user_button: button_0 {
39			label = "User";
40			gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
41			zephyr,code = <INPUT_KEY_0>;
42		};
43	};
44
45	dsi_lcd_qsh_030: connector_dsi_lcd {
46		compatible = "st,dsi-lcd-qsh-030";
47		#gpio-cells = <2>;
48		gpio-map-mask = <0xffffffff 0xffffffc0>;
49		gpio-map-pass-thru = <0 0x3f>;
50		gpio-map = <4 0 &gpioe 8 0>,	/* TOUCH_INT */
51			<22 0 &gpiod 8 0>,	/* SPI chip SEL */
52			<24 0 &gpiob 13 0>,	/* SPI CLK */
53			<26 0 &gpiod 4 0>,	/* SPI MOSI */
54			<28 0 &gpiod 11 0>,	/* SPI DCX */
55			<35 0 &gpioe 5 0>,	/* SCLK/MCLK */
56			<37 0 &gpioe 4 0>,	/* LRCLK */
57			<40 0 &gpioh 4 0>,	/* I2C5_SDA */
58			<43 0 &gpioi 7 0>,	/* SWIRE */
59			<44 0 &gpioh 5 0>,	/* I2C5_SCL */
60			<49 0 &gpiof 11 0>,	/* DSI_TE */
61			<53 0 &gpioi 6 0>,	/* LCD_BL_CTRL */
62			<57 0 &gpiod 5 0>;	/* DSI_RESET */
63	};
64
65	aliases {
66		led0 = &green_led_0;
67		led1 = &red_led_0;
68		sw0 = &user_button;
69		sdhc0 = &sdmmc1;
70		watchdog0 = &iwdg;
71		die-temp0 = &die_temp;
72		volt-sensor0 = &vref1;
73		volt-sensor1 = &vbat4;
74	};
75};
76
77&clk_hsi48 {
78	status = "okay";
79};
80
81&clk_hse {
82	clock-frequency = <DT_FREQ_M(16)>;
83	status = "okay";
84};
85
86&clk_msis {
87	status = "okay";
88	msi-range = <4>; /* 4MHz (reset value) */
89	msi-pll-mode;
90};
91
92&clk_lse {
93	status = "okay";
94};
95
96&pll1 {
97	div-m = <1>;
98	mul-n = <80>;
99	div-p = <2>;
100	div-q = <2>;
101	div-r = <2>;
102	clocks = <&clk_msis>;
103	status = "okay";
104};
105
106&rcc {
107	clocks = <&pll1>;
108	clock-frequency = <DT_FREQ_M(160)>;
109	ahb-prescaler = <1>;
110	apb1-prescaler = <1>;
111	apb2-prescaler = <1>;
112	apb3-prescaler = <1>;
113};
114
115&usart1 {
116	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
117	pinctrl-names = "default";
118	current-speed = <115200>;
119	status = "okay";
120};
121
122uart0: &usart3 {
123	pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
124	pinctrl-names = "default";
125	current-speed = <115200>;
126	status = "okay";
127};
128
129&lpuart1 {
130	pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
131	pinctrl-names = "default";
132	current-speed = <9600>;
133	status = "okay";
134};
135
136&i2c1 {
137	pinctrl-0 = <&i2c1_scl_pg14 &i2c1_sda_pg13>;
138	pinctrl-names = "default";
139	status = "okay";
140	clock-frequency = <I2C_BITRATE_STANDARD>;
141};
142
143&i2c2 {
144	pinctrl-0 = <&i2c2_scl_pf1 &i2c2_sda_pf0>;
145	pinctrl-names = "default";
146	status = "okay";
147	clock-frequency = <I2C_BITRATE_STANDARD>;
148};
149
150&i2c6 {
151	pinctrl-0 = <&i2c6_scl_pd1 &i2c6_sda_pd0>;
152	pinctrl-names = "default";
153	status = "okay";
154	clock-frequency = <I2C_BITRATE_STANDARD>;
155};
156
157&spi2 {
158	pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pd3 &spi2_mosi_pd4>;
159	pinctrl-names = "default";
160	cs-gpios = <&gpiob 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
161	status = "okay";
162};
163
164&spi3 {
165	pinctrl-0 = <&spi3_sck_pg9 &spi3_miso_pg10 &spi3_mosi_pg11>;
166	pinctrl-names = "default";
167	cs-gpios = <&gpiog 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
168	status = "okay";
169};
170
171&timers1 {
172	st,prescaler = <1>;
173	status = "okay";
174
175	pwm1: pwm {
176		status = "okay";
177		pinctrl-0 = <&tim1_ch2_pe11>;
178		pinctrl-names = "default";
179	};
180};
181
182&timers2 {
183	st,prescaler = <1>;
184	status = "okay";
185
186	pwm2: pwm {
187		status = "okay";
188		pinctrl-0 = <&tim2_ch4_pa3>;
189		pinctrl-names = "default";
190	};
191};
192
193/* Connected to onboard 4-Gbyte eMMC flash memory */
194&sdmmc1 {
195	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
196		&sdmmc1_d2_pc10 &sdmmc1_d3_pc11
197		&sdmmc1_d4_pb8 &sdmmc1_d5_pb9
198		&sdmmc1_d6_pc6 &sdmmc1_d7_pc7
199		&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
200	pinctrl-names = "default";
201	status = "okay";
202};
203
204&adc1 {
205	pinctrl-0 = <&adc1_in5_pa0 &adc1_in14_pc5>;
206	pinctrl-names = "default";
207	st,adc-clock-source = <ASYNC>;
208	st,adc-prescaler = <1>;
209	status = "okay";
210
211	#address-cells = <1>;
212	#size-cells = <0>;
213
214	channel@5 {
215		reg = <0x5>;
216		zephyr,gain = "ADC_GAIN_1";
217		zephyr,reference = "ADC_REF_INTERNAL";
218		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
219		zephyr,resolution = <14>;
220	};
221
222	channel@e {
223		reg = <0xe>;
224		zephyr,gain = "ADC_GAIN_1";
225		zephyr,reference = "ADC_REF_INTERNAL";
226		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
227		zephyr,resolution = <14>;
228	};
229};
230
231&adc4 {
232	pinctrl-0 = <&adc4_in5_pf14>;
233	pinctrl-names = "default";
234	st,adc-clock-source = <ASYNC>;
235	st,adc-prescaler = <1>;
236	status = "okay";
237
238	#address-cells = <1>;
239	#size-cells = <0>;
240
241	channel@5 {
242		reg = <0x5>;
243		zephyr,gain = "ADC_GAIN_1";
244		zephyr,reference = "ADC_REF_INTERNAL";
245		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
246		zephyr,resolution = <12>;
247	};
248};
249
250zephyr_udc0: &usbotg_hs {
251	pinctrl-0 = <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>;
252	pinctrl-names = "default";
253	status = "okay";
254};
255
256&flash0 {
257	partitions {
258		compatible = "fixed-partitions";
259		#address-cells = <1>;
260		#size-cells = <1>;
261
262		/*
263		 * Following flash partition is dedicated to the use of bootloader
264		 */
265		boot_partition: partition@0 {
266			label = "mcuboot";
267			reg = <0x00000000 DT_SIZE_K(64)>;
268		};
269		slot0_partition: partition@10000 {
270			label = "image-0";
271			reg = <0x00010000 DT_SIZE_K(1952)>;
272		};
273		slot1_partition: partition@1f8000 {
274			label = "image-1";
275			reg = <0x001f8000 DT_SIZE_K(1960)>;
276		};
277		storage_partition: partition@3e2000 {
278			label = "storage";
279			reg = <0x003e2000 DT_SIZE_K(120)>;
280		};
281	};
282};
283
284&rtc {
285	clocks =  <&rcc STM32_CLOCK_BUS_APB3 0x00200000>,
286			<&rcc STM32_SRC_LSE RTC_SEL(1)>;
287	status = "okay";
288};
289
290&iwdg {
291	status = "okay";
292};
293
294&rng {
295	status = "okay";
296};
297
298&die_temp {
299	status = "okay";
300};
301
302&vref1 {
303	status = "okay";
304};
305
306&vbat4 {
307	status = "okay";
308};
309