1.. _stm32h573i_dk_board: 2 3ST STM32H573I-DK Discovery 4########################## 5 6Overview 7******** 8 9The STM32H573I-DK Discovery kit is designed as a complete demonstration and 10development platform for STMicroelectronics Arm |reg| Cortex |reg|-M33 core-based 11STM32H573IIK3Q microcontroller with TrustZone |reg|. Here are some highlights of 12the STM32H573I-DK Discovery board: 13 14 15- STM32H573IIK3Q microcontroller featuring 2 Mbytes of Flash memory and 640 Kbytes of SRAM in 176-pin BGA package 16- 1.54-inch 240x240 pixels TFT-LCD with LED backlight and touch panel 17- USB Type-C |trade| Host and device with USB power-delivery controller 18- SAI Audio DAC stereo with one audio jacks for input/output, 19- ST MEMS digital microphone with PDM interface 20- Octo-SPI interface connected to 512Mbit Octo-SPI NORFlash memory device (MX25LM51245GXDI00 from MACRONIX) 21- 10/100-Mbit Ethernet, 22- microSD |trade| 23- A Wi‑Fi® add-on board 24- Board connectors 25 26 - STMod+ expansion connector with fan-out expansion board for Wi‑Fi |reg|, Grove and mikroBUS |trade| compatible connectors 27 - Pmod |trade| expansion connector 28 - Audio MEMS daughterboard expansion connector 29 - ARDUINO |reg| Uno V3 expansion connector 30 31- Flexible power-supply options 32 33 - ST-LINK 34 - USB VBUS 35 - external sources 36 37- On-board STLINK-V3E debugger/programmer with USB re-enumeration capability: 38 39 - mass storage 40 - Virtual COM port 41 - debug port 42 43- 4 user LEDs 44- User and reset push-buttons 45 46.. image:: img/stm32h573i_dk.jpg 47 :align: center 48 :alt: STM32H573I-DK Discovery 49 50More information about the board can be found at the `STM32H573I-DK Discovery website`_. 51 52Hardware 53******** 54 55The STM32H573xx devices are an high-performance microcontrollers family (STM32H5 56Series) based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core. 57They operate at a frequency of up to 250 MHz. 58 59- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU. 60- Performance benchmark: 61 62 - 375 DMPIS/MHz (Dhrystone 2.1) 63 64- Security 65 66 - Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension 67 - Up to 8 configurable SAU regions 68 - TrustZone |reg| aware and securable peripherals 69 - Flexible lifecycle scheme with secure debug authentication 70 - Preconfigured immutable root of trust (ST-iROT) 71 - SFI (secure firmware installation) 72 - Secure data storage with hardware unique key (HUK) 73 - Secure firmware upgrade support with TF-M 74 - 2x AES coprocessors including one with DPA resistance 75 - Public key accelerator, DPA resistant 76 - On-the-fly decryption of Octo-SPI external memories 77 - HASH hardware accelerator 78 - True random number generator, NIST SP800-90B compliant 79 - 96-bit unique ID 80 - Active tampers 81 - True Random Number Generator (RNG) NIST SP800-90B compliant 82 83- Clock management: 84 85 - 25 MHz crystal oscillator (HSE) 86 - 32 kHz crystal oscillator for RTC (LSE) 87 - Internal 64 MHz (HSI) trimmable by software 88 - Internal low-power 32 kHz RC (LSI)( |plusminus| 5%) 89 - Internal 4 MHz oscillator (CSI), trimmable by software 90 - Internal 48 MHz (HSI48) with recovery system 91 - 3 PLLs for system clock, USB, audio, ADC 92 93- Power management 94 95 - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry 96 - Embedded SMPS step-down converter 97 98- RTC with HW calendar, alarms and calibration 99- Up to 139 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V 100- Up to 16 timers and 2 watchdogs 101 102 - 12x 16-bit 103 - 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input 104 - 6x 16-bit low-power 16-bit timers (available in Stop mode) 105 - 2x watchdogs 106 - 2x SysTick timer 107 108- Memories 109 110 - Up to 2 MB Flash, 2 banks read-while-write 111 - 1 Kbyte OTP (one-time programmable) 112 - 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC 113 - 4 Kbytes of backup SRAM available in the lowest power modes 114 - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories 115 - 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats 116 - 2x SD/SDIO/MMC interfaces 117 118- Rich analog peripherals (independent supply) 119 120 - 2x 12-bit ADC with up to 5 MSPS in 12-bit 121 - 2x 12-bit D/A converters 122 - 1x Digital temperature sensor 123 124- 34x communication interfaces 125 126 - 1x USB Type-C / USB power-delivery controller 127 - 1x USB 2.0 full-speed host and device 128 - 4x I2C FM+ interfaces (SMBus/PMBus) 129 - 1x I3C interface 130 - 12x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) 131 - 1x LP UART 132 - 6x SPIs including 3 muxed with full-duplex I2S 133 - 5x additional SPI from 5x USART when configured in Synchronous mode 134 - 2x SAI 135 - 2x FDCAN 136 - 1x SDMMC interface 137 - 2x 16 channel DMA controllers 138 - 1x 8- to 14- bit camera interface 139 - 1x HDMI-CEC 140 - 1x Ethernel MAC interface with DMA controller 141 - 1x 16-bit parallel slave synchronous-interface 142 143- CORDIC for trigonometric functions acceleration 144- FMAC (filter mathematical accelerator) 145- CRC calculation unit 146- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| 147 148 149More information about STM32H573 can be found here: 150 151- `STM32H573 on www.st.com`_ 152- `STM32H573 reference manual`_ 153 154Supported Features 155================== 156 157The Zephyr STM32H573I_DK board configuration supports the following 158hardware features: 159 160+-----------+------------+-------------------------------------+ 161| Interface | Controller | Driver/Component | 162+===========+============+=====================================+ 163| CLOCK | on-chip | reset and clock control | 164+-----------+------------+-------------------------------------+ 165| GPIO | on-chip | gpio | 166+-----------+------------+-------------------------------------+ 167| NVIC | on-chip | nested vector interrupt controller | 168+-----------+------------+-------------------------------------+ 169| PINMUX | on-chip | pinmux | 170+-----------+------------+-------------------------------------+ 171| RNG | on-chip | True Random number generator | 172+-----------+------------+-------------------------------------+ 173| UART | on-chip | serial port-polling; | 174| | | serial port-interrupt | 175+-----------+------------+-------------------------------------+ 176| WATCHDOG | on-chip | independent watchdog | 177+-----------+------------+-------------------------------------+ 178| DAC | on-chip | DAC Controller | 179+-----------+------------+-------------------------------------+ 180| ADC | on-chip | ADC Controller | 181+-----------+------------+-------------------------------------+ 182| PWM | on-chip | PWM | 183+-----------+------------+-------------------------------------+ 184| RTC | on-chip | Real Time Clock | 185+-----------+------------+-------------------------------------+ 186| I2C | on-chip | i2c bus | 187+-----------+------------+-------------------------------------+ 188| SPI | on-chip | spi bus | 189+-----------+------------+-------------------------------------+ 190| OCTOSPI | on-chip | octospi | 191+-----------+------------+-------------------------------------+ 192| CAN | on-chip | can bus | 193+-----------+------------+-------------------------------------+ 194| AES | on-chip | crypto | 195+-----------+------------+-------------------------------------+ 196| SDMMC | on-chip | disk access | 197+-----------+------------+-------------------------------------+ 198| USB | on-chip | USB full-speed host/device bus | 199+-----------+------------+-------------------------------------+ 200| RTC | on-chip | rtc | 201+-----------+------------+-------------------------------------+ 202 203 204Other hardware features are not yet supported on this Zephyr port. 205 206The default configuration can be found in the defconfig and dts files: 207 208- Secure target: 209 210 - :zephyr_file:`boards/st/stm32h573i_dk/stm32h573i_dk_defconfig` 211 - :zephyr_file:`boards/st/stm32h573i_dk/stm32h573i_dk.dts` 212 213Connections and IOs 214=================== 215 216STM32H573I-DK Discovery Board has 9 GPIO controllers. These controllers are responsible for pin muxing, 217input/output, pull-up, etc. 218 219For more details please refer to `STM32H573I-DK Discovery board User Manual`_. 220 221Default Zephyr Peripheral Mapping: 222---------------------------------- 223 224- USART_1 TX/RX : PA9/PA10 (VCP) 225- USART_3 TX/RX : PB11/PB10 (Arduino USART3) 226- USER_PB : PC13 227- LD1 (green) : PI9 228- DAC1 channel 1 output : PA4 229- ADC1 channel 6 input : PF12 230 231System Clock 232------------ 233 234STM32H573I-DK System Clock could be driven by internal or external oscillator, 235as well as main PLL clock. By default System clock is driven by PLL clock at 236240MHz, driven by 25MHz external oscillator (HSE). 237 238Serial Port 239----------- 240 241STM32H573I-DK Discovery board has 3 U(S)ARTs. The Zephyr console output is 242assigned to USART1. Default settings are 115200 8N1. 243 244 245Programming and Debugging 246************************* 247 248Applications for the ``stm32h573i_dk`` board configuration can be built and 249flashed in the usual way (see :ref:`build_an_application` and 250:ref:`application_run` for more details). 251 252OpenOCD Support 253=============== 254 255For now, openocd support for stm32h5 is not available on upstream OpenOCD. 256You can check `OpenOCD official Github mirror`_. 257In order to use it though, you should clone from the cutomized 258`STMicroelectronics OpenOCD Github`_ and compile it following usual README guidelines. 259Once it is done, you can set the OPENOCD and OPENOCD_DEFAULT_PATH variables in 260:zephyr_file:`boards/st/stm32h573i_dk/board.cmake` to point the build 261to the paths of the OpenOCD binary and its scripts, before 262including the common openocd.board.cmake file: 263 264 .. code-block:: none 265 266 set(OPENOCD "<path_to_openocd_repo>/src/openocd" CACHE FILEPATH "" FORCE) 267 set(OPENOCD_DEFAULT_PATH <path_to_opneocd_repo>/tcl) 268 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) 269 270 271Flashing 272======== 273 274STM32H573I-DK Discovery board includes an ST-LINK/V3E embedded debug tool 275interface. Support is available on STM32CubeProgrammer V2.13.0. 276 277 278Alternatively, pyocd or jlink via an external probe can also be used to flash 279and debug the board if west is told to use it as runner, which can be done by 280passing either or ``-r pyocd``, or ``-r jlink``. 281 282For pyocd additional target information needs to be installed. 283This can be done by executing the following commands. 284 285.. code-block:: console 286 287 $ pyocd pack --update 288 $ pyocd pack --install stm32h5 289 290 291Alternatively, the openocd interface will be supported by a next openocd version. 292When available, OpenOCD could be used in the same way as other tools. 293 294 295Flashing an application to STM32H573I-DK Discovery 296-------------------------------------------------- 297 298Connect the STM32H573I-DK Discovery to your host computer using the USB port. 299Then build and flash an application. Here is an example for the 300:ref:`hello_world` application. 301 302Run a serial host program to connect with your Nucleo board: 303 304.. code-block:: console 305 306 $ minicom -D /dev/ttyACM0 307 308Then build and flash the application. 309 310.. zephyr-app-commands:: 311 :zephyr-app: samples/hello_world 312 :board: stm32h573i_dk 313 :goals: build flash 314 315You should see the following message on the console: 316 317.. code-block:: console 318 319 Hello World! stm32h573i_dk 320 321Debugging 322========= 323 324Waiting for openocd support, debugging could be performed with pyocd which 325requires to enable "pack" support with the following pyocd command: 326 327.. code-block:: console 328 329 $ pyocd pack --update 330 $ pyocd pack --install stm32h5 331 332Once installed, you can debug an application in the usual way. Here is an 333example for the :ref:`hello_world` application. 334 335.. zephyr-app-commands:: 336 :zephyr-app: samples/hello_world 337 :board: stm32h573i_dk 338 :maybe-skip-config: 339 :goals: debug 340 341.. _STM32H573I-DK Discovery website: 342 https://www.st.com/en/evaluation-tools/stm32h573i-dk.html 343 344.. _STM32H573I-DK Discovery board User Manual: 345 https://www.st.com/en/evaluation-tools/stm32h573i-dk.html 346 347.. _STM32H573 on www.st.com: 348 https://www.st.com/en/microcontrollers/stm32h573ii.html 349 350.. _STM32H573 reference manual: 351 https://www.st.com/resource/en/reference_manual/rm0481-stm32h563h573-and-stm32h562-armbased-32bit-mcus-stmicroelectronics.pdf 352 353.. _STM32CubeProgrammer: 354 https://www.st.com/en/development-tools/stm32cubeprog.html 355 356.. _OpenOCD official Github mirror: 357 https://github.com/openocd-org/openocd/ 358 359.. _STMicroelectronics OpenOCD Github: 360 https://github.com/STMicroelectronics/OpenOCD/tree/openocd-cubeide-r6 361
