1/*
2 * Copyright (c) 2020 Teslabs Engineering S.L.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/h7/stm32h743Xi.dtsi>
9#include <st/h7/stm32h743zitx-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "STMicroelectronics STM32H743ZI-NUCLEO board";
15	compatible = "st,stm32h743zi-nucleo";
16
17	chosen {
18		zephyr,console = &usart3;
19		zephyr,shell-uart = &usart3;
20		zephyr,sram = &sram0;
21		zephyr,flash = &flash0;
22		zephyr,dtcm = &dtcm;
23		zephyr,code-partition = &slot0_partition;
24		zephyr,canbus = &fdcan1;
25	};
26
27	leds: leds {
28		compatible = "gpio-leds";
29		green_led: led_0 {
30			gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
31			label = "User LD1";
32		};
33		yellow_led: led_1 {
34			gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
35			label = "User LD2";
36		};
37	};
38
39	pwmleds {
40		compatible = "pwm-leds";
41
42		red_pwm_led: red_pwm_led {
43			pwms = <&pwm12 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
44		};
45	};
46
47	gpio_keys {
48		compatible = "gpio-keys";
49		user_button: button_0 {
50			label = "User";
51			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
52			zephyr,code = <INPUT_KEY_0>;
53		};
54	};
55
56	aliases {
57		led0 = &green_led;
58		led1 = &yellow_led;
59		pwm-led0 = &red_pwm_led;
60		sw0 = &user_button;
61		watchdog0 = &iwdg;
62		die-temp0 = &die_temp;
63		volt-sensor0 = &vref;
64		volt-sensor1 = &vbat;
65	};
66};
67
68&clk_lsi {
69	status = "okay";
70};
71
72&clk_hsi48 {
73	status = "okay";
74};
75
76&clk_hse {
77	hse-bypass;
78	clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
79	status = "okay";
80};
81
82&pll {
83	div-m = <2>;
84	mul-n = <240>;
85	div-p = <2>;
86	div-q = <2>;
87	div-r = <2>;
88	clocks = <&clk_hse>;
89	status = "okay";
90};
91
92&pll2 {
93	div-m = <4>;
94	mul-n = <120>;
95	div-p = <2>;
96	div-q = <3>; /* gives 80MHz to the FDCAN */
97	div-r = <2>;
98	clocks = <&clk_hse>;
99	status = "okay";
100};
101
102&rcc {
103	clocks = <&pll>;
104	clock-frequency = <DT_FREQ_M(480)>;
105	d1cpre = <1>;
106	hpre = <2>;
107	d1ppre = <2>;
108	d2ppre1 = <2>;
109	d2ppre2 = <2>;
110	d3ppre = <2>;
111};
112
113&usart3 {
114	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
115	pinctrl-names = "default";
116	current-speed = <115200>;
117	status = "okay";
118};
119
120zephyr_udc0: &usbotg_fs {
121	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
122	pinctrl-names = "default";
123	status = "okay";
124};
125
126&rtc {
127	clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
128		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
129	status = "okay";
130};
131
132&i2c1 {
133	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
134	pinctrl-names = "default";
135	status = "okay";
136	clock-frequency = <I2C_BITRATE_FAST>;
137};
138
139&timers12 {
140	st,prescaler = <10000>;
141	status = "okay";
142
143	pwm12: pwm {
144		status = "okay";
145		pinctrl-0 = <&tim12_ch1_pb14>;
146		pinctrl-names = "default";
147	};
148};
149
150&adc1 {
151	pinctrl-0 = <&adc1_inp15_pa3>;
152	pinctrl-names = "default";
153	st,adc-clock-source = <SYNC>;
154	st,adc-prescaler = <4>;
155	status = "okay";
156};
157
158&die_temp {
159	status = "okay";
160};
161
162&adc3 {
163	pinctrl-0 = <&adc3_inp5_pf3>;
164	pinctrl-names = "default";
165	st,adc-clock-source = <SYNC>;
166	st,adc-prescaler = <4>;
167	status = "okay";
168};
169
170&dac1 {
171	status = "okay";
172	pinctrl-0 = <&dac1_out1_pa4>;
173	pinctrl-names = "default";
174};
175
176&rng {
177	status = "okay";
178};
179
180&fdcan1 {
181	pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
182	pinctrl-names = "default";
183	clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
184		 <&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
185	status = "okay";
186};
187
188/*
189 * WARNING:
190 * Possible pin conflicts:
191 *          The pins PA2 and PB13 may conflict on selection of ETH_STM32_HAL,
192 *          since they are used in ST Zio or ST morpho connectors.
193 *          To avoid conflicting states the jumpers JP6 and JP7
194 *          must be in ON state.
195 */
196&mac {
197	status = "okay";
198	pinctrl-0 = <&eth_rxd0_pc4
199		     &eth_rxd1_pc5
200		     &eth_ref_clk_pa1
201		     &eth_crs_dv_pa7
202		     &eth_tx_en_pg11
203		     &eth_txd0_pg13
204		     &eth_txd1_pb13>;
205	pinctrl-names = "default";
206};
207
208&mdio {
209	status = "okay";
210	pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
211	pinctrl-names = "default";
212
213	ethernet-phy@0 {
214		compatible = "ethernet-phy";
215		reg = <0x00>;
216		status = "okay";
217	};
218};
219
220&spi1 {
221	status = "okay";
222	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
223	pinctrl-names = "default";
224	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
225};
226
227&backup_sram {
228	status = "okay";
229};
230
231&flash0 {
232	partitions {
233		compatible = "fixed-partitions";
234		#address-cells = <1>;
235		#size-cells = <1>;
236
237		/* 128KB for bootloader */
238		boot_partition: partition@0 {
239			label = "mcuboot";
240			reg = <0x00000000 DT_SIZE_K(128)>;
241			read-only;
242		};
243
244		/* storage: 128KB for settings */
245		storage_partition: partition@20000 {
246			label = "storage";
247			reg = <0x00020000 DT_SIZE_K(128)>;
248		};
249
250		/* application image slot: 256KB */
251		slot0_partition: partition@40000 {
252			label = "image-0";
253			reg = <0x00040000 DT_SIZE_K(256)>;
254		};
255
256		/* backup slot: 256KB */
257		slot1_partition: partition@80000 {
258			label = "image-1";
259			reg = <0x00080000 DT_SIZE_K(256)>;
260		};
261
262		/* swap slot: 128KB */
263		scratch_partition: partition@c0000 {
264			label = "image-scratch";
265			reg = <0x000c0000 DT_SIZE_K(128)>;
266		};
267
268	};
269};
270
271&iwdg1 {
272	status = "okay";
273};
274
275&vref {
276	status = "okay";
277};
278
279&vbat {
280	status = "okay";
281};
282