1/*
2 * Copyright (c) 2020 Thomas Stranger
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/g0/stm32g0b1Xe.dtsi>
9#include <st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include "st_morpho_connector.dtsi"
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13
14/ {
15	model = "STMicroelectronics STM32G0B1RE-NUCLEO board";
16	compatible = "st,stm32g0b1re-nucleo";
17
18	chosen {
19		zephyr,console = &usart2;
20		zephyr,shell-uart = &usart2;
21		zephyr,uart-mcumgr = &usart2;
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash0;
24		zephyr,code-partition = &slot0_partition;
25		zephyr,canbus = &fdcan1;
26	};
27
28	leds: leds {
29		compatible = "gpio-leds";
30		green_led_1: led_4 {
31			gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
32			label = "User LD4";
33		};
34	};
35
36	gpio_keys {
37		compatible = "gpio-keys";
38		user_button: button {
39			label = "User";
40			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
41			zephyr,code = <INPUT_KEY_0>;
42		};
43	};
44
45	aliases {
46		led0 = &green_led_1;
47		sw0 = &user_button;
48		watchdog0 = &iwdg;
49		die-temp0 = &die_temp;
50		volt-sensor0 = &vref;
51		volt-sensor1 = &vbat;
52	};
53};
54
55&clk_lsi {
56	status = "okay";
57};
58
59&clk_hsi {
60	status = "okay";
61};
62
63&clk_hsi48 {
64	status = "okay";
65	crs-usb-sof;
66};
67
68&pll {
69	div-m = <1>;
70	mul-n = <8>;
71	div-p = <2>;
72	div-q = <2>;
73	div-r = <2>;
74	clocks = <&clk_hsi>;
75	status = "okay";
76};
77
78&rcc {
79	clocks = <&pll>;
80	clock-frequency = <DT_FREQ_M(64)>;
81	ahb-prescaler = <1>;
82	apb1-prescaler = <1>;
83};
84
85zephyr_udc0: &usb {
86	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
87	pinctrl-names = "default";
88	status = "okay";
89};
90
91&usart1 {
92	pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
93	pinctrl-names = "default";
94	current-speed = <115200>;
95	status = "okay";
96};
97
98&usart2 {
99	pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
100	pinctrl-names = "default";
101	current-speed = <115200>;
102	status = "okay";
103};
104
105&rtc {
106	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
107		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
108	status = "okay";
109};
110
111&iwdg {
112	status = "okay";
113};
114
115&timers3 {
116	st,prescaler = <10000>;
117	status = "okay";
118	pwm3: pwm {
119		status = "okay";
120		pinctrl-0 = <&tim3_ch1_pb4>;
121		pinctrl-names = "default";
122	};
123};
124
125&timers15 {
126	st,prescaler = <10000>;
127	status = "okay";
128	pwm15: pwm {
129		status = "okay";
130		pinctrl-0 = <&tim15_ch1_pb14>;
131		pinctrl-names = "default";
132	};
133};
134
135&i2c1 {
136	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
137	pinctrl-names = "default";
138	status = "okay";
139	clock-frequency = <I2C_BITRATE_FAST>;
140};
141
142&i2c2 {
143	pinctrl-0 = <&i2c2_scl_pa11 &i2c2_sda_pa12>;
144	pinctrl-names = "default";
145	status = "okay";
146	clock-frequency = <I2C_BITRATE_FAST>;
147};
148
149&spi1 {
150	pinctrl-0 = <&spi1_nss_pb0 &spi1_sck_pa5
151		     &spi1_miso_pa6 &spi1_mosi_pa7>;
152	pinctrl-names = "default";
153	status = "okay";
154};
155
156&spi2 {
157	pinctrl-0 = <&spi2_nss_pd0 &spi2_sck_pd1
158		     &spi2_miso_pd3 &spi2_mosi_pd4>;
159	pinctrl-names = "default";
160	status = "okay";
161};
162
163&adc1 {
164	pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1>;
165	pinctrl-names = "default";
166	st,adc-clock-source = <SYNC>;
167	st,adc-prescaler = <4>;
168	status = "okay";
169};
170
171&die_temp {
172	status = "okay";
173};
174
175&dac1 {
176	status = "okay";
177	pinctrl-0 = <&dac1_out1_pa4>;
178	pinctrl-names = "default";
179};
180
181&fdcan1 {
182	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>,
183		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
184	pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
185	pinctrl-names = "default";
186	status = "okay";
187};
188
189&fdcan2 {
190	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>,
191		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
192	pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>;
193	pinctrl-names = "default";
194	status = "okay";
195};
196
197&flash0 {
198	partitions {
199		compatible = "fixed-partitions";
200		#address-cells = <1>;
201		#size-cells = <1>;
202
203		boot_partition: partition@0 {
204			label = "mcuboot";
205			reg = <0x00000000 DT_SIZE_K(48)>;
206			read-only;
207		};
208		slot0_partition: partition@C000 {
209			label = "image-0";
210			reg = <0x0000C000 DT_SIZE_K(200)>;
211		};
212		slot1_partition: partition@3E000 {
213			label = "image-1";
214			reg = <0x0003E000 DT_SIZE_K(200)>;
215		};
216		/* final 64KiB reserved for app storage partition */
217		storage_partition: partition@70000 {
218			label = "storage";
219			reg = <0x00070000 DT_SIZE_K(64)>;
220		};
221	};
222};
223
224stm32_lp_tick_source: &lptim1 {
225	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
226		 <&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
227	status = "okay";
228};
229
230&vref {
231	status = "okay";
232};
233
234&vbat {
235	status = "okay";
236};
237