1.. _nucleo_f207zg_board: 2 3ST Nucleo F207ZG 4################ 5 6Overview 7******** 8 9The Nucleo F207ZG board features an ARM Cortex-M3 based STM32F207ZG MCU 10with a wide range of connectivity support and configurations. Here are 11some highlights of the Nucleo F207ZG board: 12 13- STM32 microcontroller in LQFP144 package 14- Ethernet compliant with IEEE-802.3-2002 15- Two types of extension resources: 16 17 - ST Zio connector including: support for Arduino* Uno V3 connectivity 18 (A0 to A5, D0 to D15) and additional signals exposing a wide range of 19 peripherals 20 - ST morpho extension pin headers for full access to all STM32 I/Os 21 22- On-board ST-LINK/V2-1 debugger/programmer with SWD connector 23- Flexible board power supply: 24 25 - 5 V from ST-LINK/V2-1 USB VBUS 26 - External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho 27 connectors, 5 V on ST morpho connector 28 29- Three user LEDs 30- Two push-buttons: USER and RESET 31 32.. image:: img/nucleo_f207zg.jpg 33 :align: center 34 :alt: Nucleo F207ZG 35 36More information about the board can be found at the `Nucleo F207ZG website`_. 37 38Hardware 39******** 40 41Nucleo F207ZG provides the following hardware components: 42 43- STM32F207ZGT6 in LQFP144 package 44- ARM |reg| 32-bit Cortex |reg| -M3 CPU 45- 120 MHz max CPU frequency 46- VDD from 1.7 V to 3.6 V 47- 1 MB Flash 48- 128 KB SRAM 49- GPIO with external interrupt capability 50- 12-bit ADC with 24 channels 51- RTC 52- 17 General purpose timers 53- 2 watchdog timers (independent and window) 54- SysTick timer 55- USART/UART (6) 56- I2C (3) 57- SPI (3) 58- SDIO 59- USB 2.0 OTG FS 60- DMA Controller 61- 10/100 Ethernet MAC with dedicated DMA 62- CRC calculation unit 63- True random number generator 64 65More information about STM32F207ZG can be found here: 66 67- `STM32F207ZG on www.st.com`_ 68- `STM32F207 reference manual`_ 69 70Supported Features 71================== 72 73The Zephyr nucleo_207zg board configuration supports the following hardware features: 74 75+-------------+------------+-------------------------------------+ 76| Interface | Controller | Driver/Component | 77+=============+============+=====================================+ 78| NVIC | on-chip | nested vector interrupt controller | 79+-------------+------------+-------------------------------------+ 80| UART | on-chip | serial port-polling; | 81| | | serial port-interrupt | 82+-------------+------------+-------------------------------------+ 83| PINMUX | on-chip | pinmux | 84+-------------+------------+-------------------------------------+ 85| GPIO | on-chip | gpio | 86+-------------+------------+-------------------------------------+ 87| ETHERNET | on-chip | Ethernet | 88+-------------+------------+-------------------------------------+ 89| I2C | on-chip | i2c | 90+-------------+------------+-------------------------------------+ 91| USB | on-chip | USB device | 92+-------------+------------+-------------------------------------+ 93| SPI | on-chip | spi | 94+-------------+------------+-------------------------------------+ 95| WATCHDOG | on-chip | independent watchdog | 96+-------------+------------+-------------------------------------+ 97| ADC | on-chip | ADC Controller | 98+-------------+------------+-------------------------------------+ 99| DAC | on-chip | DAC Controller | 100+-------------+------------+-------------------------------------+ 101| Backup SRAM | on-chip | Backup SRAM | 102+-------------+------------+-------------------------------------+ 103| PWM | on-chip | PWM | 104+-------------+------------+-------------------------------------+ 105| RNG | on-chip | Random Number Generator | 106+-------------+------------+-------------------------------------+ 107| DMA | on-chip | Direct Memory Access | 108+-------------+------------+-------------------------------------+ 109| die-temp | on-chip | die temperature sensor | 110+-------------+------------+-------------------------------------+ 111| RTC | on-chip | rtc | 112+-------------+------------+-------------------------------------+ 113 114Other hardware features are not yet supported on this Zephyr port. 115 116The default configuration can be found in the defconfig file: 117:zephyr_file:`boards/st/nucleo_f207zg/nucleo_f207zg_defconfig` 118 119 120Connections and IOs 121=================== 122 123Nucleo F207ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing, 124input/output, pull-up, etc. 125 126Available pins: 127--------------- 128.. image:: img/nucleo_f207zg_zio_left.jpg 129 :align: center 130 :alt: Nucleo F207ZG ZIO connectors (left) 131.. image:: img/nucleo_f207zg_zio_right.jpg 132 :align: center 133 :alt: Nucleo F207ZG ZIO connectors (right) 134.. image:: img/nucleo_f207zg_morpho_left.jpg 135 :align: center 136 :alt: Nucleo F207ZG Morpho connectors (left) 137.. image:: img/nucleo_f207zg_morpho_right.jpg 138 :align: center 139 :alt: Nucleo F207ZG Morpho connectors (right) 140 141For more details please refer to `STM32 Nucleo-144 board User Manual`_. 142 143Default Zephyr Peripheral Mapping: 144---------------------------------- 145 146- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com) 147- UART_6 TX/RX : PG14/PG9 (Arduino Serial) 148- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C) 149- SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PA7 (Arduino SPI) 150- ETH : PA1, PA2, PA7, PB13, PC1, PC4, PC5, PG11, PG13 151- USB_DM : PA11 152- USB_DP : PA12 153- USER_PB : PC13 154- LD1 : PB0 155- LD2 : PB7 156- LD3 : PB14 157- DAC: PA4 158- ADC: PA0 159- PWM_1_CH1 : PE9 160 161System Clock 162------------ 163 164Nucleo F207ZG System Clock could be driven by internal or external oscillator, 165as well as main PLL clock. By default System clock is driven by PLL clock at 120MHz, 166driven by 8MHz high speed external clock. 167 168Serial Port 169----------- 170 171Nucleo F207ZG board has 4 UARTs. The Zephyr console output is assigned to UART3. 172Default settings are 115200 8N1. 173 174Network interface 175----------------- 176 177Ethernet configured as the default network interface 178 179USB 180--- 181Nucleo F207ZG board has a USB OTG dual-role device (DRD) controller that 182supports both device and host functions through its micro USB connector 183(USB USER). Only USB device function is supported in Zephyr at the moment. 184 185Backup SRAM 186----------- 187 188In order to test backup SRAM you may want to disconnect VBAT from VDD. You can 189do it by removing ``SB156`` jumper on the back side of the board. 190 191Programming and Debugging 192************************* 193 194Nucleo F207ZG board includes an ST-LINK/V2-1 embedded debug tool interface. 195This interface is supported by the openocd version included in Zephyr SDK. 196 197 198.. _Nucleo F207ZG website: 199 https://www.st.com/en/evaluation-tools/nucleo-f207zg.html 200 201.. _STM32 Nucleo-144 board User Manual: 202 https://www.st.com/resource/en/user_manual/dm00244518.pdf 203 204.. _STM32F207ZG on www.st.com: 205 https://www.st.com/en/microcontrollers/stm32f207zg.html 206 207.. _STM32F207 reference manual: 208 https://www.st.com/resource/en/reference_manual/cd00225773.pdf 209