1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by gen_board_pinctrl.py
6 * from teensy4.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1062dvl6a-pinctrl.dtsi>
10
11&pinctrl {
12	/* Mode Straps configuration DP83825 */
13	pinmux_enet: pinmux_enet {
14		group0 {
15			pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
16				<&iomuxc_gpio_b1_06_enet_rx_en>,
17				<&iomuxc_gpio_b1_11_enet_rx_er>;
18			drive-strength = "r0-5";
19			bias-pull-down;
20			bias-pull-down-value = "100k";
21			slew-rate = "fast";
22			nxp,speed = "200-mhz";
23		};
24		group1 {
25			pinmux = <&iomuxc_gpio_b1_05_enet_rx_data1>;
26			drive-strength = "r0-5";
27			bias-pull-up;
28			bias-pull-up-value = "22k";
29			slew-rate = "fast";
30			nxp,speed = "200-mhz";
31		};
32		group2 {
33			pinmux = <&iomuxc_gpio_b1_07_enet_tx_data0>,
34				<&iomuxc_gpio_b1_08_enet_tx_data1>,
35				<&iomuxc_gpio_b1_09_enet_tx_en>,
36				<&iomuxc_gpio_b1_14_enet_mdc>,
37				<&iomuxc_gpio_b1_15_enet_mdio>,
38				<&iomuxc_gpio_b0_15_gpio2_io15>,
39				<&iomuxc_gpio_b0_14_gpio2_io14>;
40			drive-strength = "r0-6";
41			slew-rate = "slow";
42			nxp,speed = "100-mhz";
43		};
44		group3 {
45			pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
46			drive-strength = "r0-6";
47			slew-rate = "slow";
48			nxp,speed = "100-mhz";
49			input-enable;
50		};
51	};
52
53	/* FLEXCAN1 TX, RX on Teensy-Pins 22/23 */
54	pinmux_flexcan1: pinmux_flexcan1 {
55		group0 {
56			pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
57				<&iomuxc_gpio_ad_b1_09_flexcan1_rx>;
58			drive-strength = "r0-6";
59			slew-rate = "slow";
60			nxp,speed = "100-mhz";
61			input-enable;
62		};
63	};
64
65	/* FLEXCAN2 TX, RX on Teensy-Pins 1/0 */
66	pinmux_flexcan2: pinmux_flexcan2 {
67		group0 {
68			pinmux = <&iomuxc_gpio_ad_b0_02_flexcan2_tx>,
69				<&iomuxc_gpio_ad_b0_03_flexcan2_rx>;
70			drive-strength = "r0-6";
71			slew-rate = "slow";
72			nxp,speed = "100-mhz";
73			input-enable;
74		};
75	};
76
77	/* FLEXCAN3 TX, RX on Teensy-Pins 31/30 */
78	pinmux_flexcan3: pinmux_flexcan3 {
79		group0 {
80			pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>,
81				<&iomuxc_gpio_emc_37_flexcan3_rx>;
82			drive-strength = "r0-6";
83			slew-rate = "slow";
84			nxp,speed = "100-mhz";
85			input-enable;
86		};
87	};
88
89	/* LPI2C1 SCL, SDA on Teensy-Pins 19/18 */
90	pinmux_lpi2c1: pinmux_lpi2c1 {
91		group0 {
92			pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
93				<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
94			drive-strength = "r0-6";
95			drive-open-drain;
96			slew-rate = "slow";
97			nxp,speed = "100-mhz";
98			input-enable;
99		};
100	};
101
102	/* LPI2C3 SCL, SDA on Teensy-Pins 16/17 */
103	pinmux_lpi2c3: pinmux_lpi2c3 {
104		group0 {
105			pinmux = <&iomuxc_gpio_ad_b1_07_lpi2c3_scl>,
106				<&iomuxc_gpio_ad_b1_06_lpi2c3_sda>;
107			drive-strength = "r0-6";
108			drive-open-drain;
109			slew-rate = "slow";
110			nxp,speed = "100-mhz";
111			input-enable;
112		};
113	};
114
115	/* LPI2C4 SCL, SDA on Teensy-Pins 24/25 */
116	pinmux_lpi2c4: pinmux_lpi2c4 {
117		group0 {
118			pinmux = <&iomuxc_gpio_ad_b0_12_lpi2c4_scl>,
119				<&iomuxc_gpio_ad_b0_13_lpi2c4_sda>;
120			drive-strength = "r0-6";
121			drive-open-drain;
122			slew-rate = "slow";
123			nxp,speed = "100-mhz";
124			input-enable;
125		};
126	};
127
128	/* LPSPI3 MISO, MOSI, SCK, CS on Teensy-Pins 39/26/27/38 */
129	pinmux_lpspi3: pinmux_lpspi3 {
130		group0 {
131			pinmux = <&iomuxc_gpio_ad_b1_12_lpspi3_pcs0>,
132				<&iomuxc_gpio_ad_b0_00_lpspi3_sck>,
133				<&iomuxc_gpio_ad_b0_02_lpspi3_sdi>,
134				<&iomuxc_gpio_ad_b0_01_lpspi3_sdo>;
135			drive-strength = "r0-6";
136			slew-rate = "slow";
137			nxp,speed = "100-mhz";
138		};
139	};
140
141	/* LPSPI4 MISO, MOSI, SCK, CS on Teensy-Pins 12/11/13/10 */
142	pinmux_lpspi4: pinmux_lpspi4 {
143		group0 {
144			pinmux = <&iomuxc_gpio_b0_00_lpspi4_pcs0>,
145				<&iomuxc_gpio_b0_03_lpspi4_sck>,
146				<&iomuxc_gpio_b0_01_lpspi4_sdi>,
147				<&iomuxc_gpio_b0_02_lpspi4_sdo>;
148			drive-strength = "r0-6";
149			slew-rate = "slow";
150			nxp,speed = "100-mhz";
151		};
152	};
153
154	/* LPUART1 TX/RX on Teensy-Pins 24/25 */
155	pinmux_lpuart1: pinmux_lpuart1 {
156		group0 {
157			pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
158				<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
159			drive-strength = "r0-6";
160			slew-rate = "slow";
161			nxp,speed = "100-mhz";
162		};
163	};
164
165	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
166		group0 {
167			pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
168			drive-strength = "r0-6";
169			bias-pull-up;
170			bias-pull-up-value = "100k";
171			slew-rate = "slow";
172			nxp,speed = "100-mhz";
173		};
174		group1 {
175			pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
176			drive-strength = "r0-6";
177			slew-rate = "slow";
178			nxp,speed = "100-mhz";
179		};
180	};
181
182	/* LPUART2 TX/RX on Teensy-Pins 14/15 */
183	pinmux_lpuart2: pinmux_lpuart2 {
184		group0 {
185			pinmux = <&iomuxc_gpio_ad_b1_03_lpuart2_rx>,
186				<&iomuxc_gpio_ad_b1_02_lpuart2_tx>;
187			drive-strength = "r0-6";
188			slew-rate = "slow";
189			nxp,speed = "100-mhz";
190		};
191	};
192
193	pinmux_lpuart2_sleep: pinmux_lpuart2_sleep {
194		group0 {
195			pinmux = <&iomuxc_gpio_ad_b1_03_gpio1_io19>;
196			drive-strength = "r0-6";
197			bias-pull-up;
198			bias-pull-up-value = "100k";
199			slew-rate = "slow";
200			nxp,speed = "100-mhz";
201		};
202		group1 {
203			pinmux = <&iomuxc_gpio_ad_b1_02_lpuart2_tx>;
204			drive-strength = "r0-6";
205			slew-rate = "slow";
206			nxp,speed = "100-mhz";
207		};
208	};
209
210	/* LPUART3 TX/RX on Teensy-Pins 17/16 */
211	pinmux_lpuart3: pinmux_lpuart3 {
212		group0 {
213			pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>,
214				<&iomuxc_gpio_ad_b1_06_lpuart3_tx>;
215			drive-strength = "r0-6";
216			slew-rate = "slow";
217			nxp,speed = "100-mhz";
218		};
219	};
220
221	pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
222		group0 {
223			pinmux = <&iomuxc_gpio_ad_b1_07_gpio1_io23>;
224			drive-strength = "r0-6";
225			bias-pull-up;
226			bias-pull-up-value = "100k";
227			slew-rate = "slow";
228			nxp,speed = "100-mhz";
229		};
230		group1 {
231			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>;
232			drive-strength = "r0-6";
233			slew-rate = "slow";
234			nxp,speed = "100-mhz";
235		};
236	};
237
238	/* LPUART4 TX/RX on Teensy-Pins 8/7 */
239	pinmux_lpuart4: pinmux_lpuart4 {
240		group0 {
241			pinmux = <&iomuxc_gpio_b1_01_lpuart4_rx>,
242				<&iomuxc_gpio_b1_00_lpuart4_tx>;
243			drive-strength = "r0-6";
244			slew-rate = "slow";
245			nxp,speed = "100-mhz";
246		};
247	};
248
249	pinmux_lpuart4_sleep: pinmux_lpuart4_sleep {
250		group0 {
251			pinmux = <&iomuxc_gpio_b1_01_gpio2_io17>;
252			drive-strength = "r0-6";
253			bias-pull-up;
254			bias-pull-up-value = "100k";
255			slew-rate = "slow";
256			nxp,speed = "100-mhz";
257		};
258		group1 {
259			pinmux = <&iomuxc_gpio_b1_00_lpuart4_tx>;
260			drive-strength = "r0-6";
261			slew-rate = "slow";
262			nxp,speed = "100-mhz";
263		};
264	};
265
266	/* LPUART5 TX/RX on Teensy-Pins 35/34 */
267	pinmux_lpuart5: pinmux_lpuart5 {
268		group0 {
269			pinmux = <&iomuxc_gpio_b1_13_lpuart5_rx>,
270				<&iomuxc_gpio_b1_12_lpuart5_tx>;
271			drive-strength = "r0-6";
272			slew-rate = "slow";
273			nxp,speed = "100-mhz";
274		};
275	};
276
277	pinmux_lpuart5_sleep: pinmux_lpuart5_sleep {
278		group0 {
279			pinmux = <&iomuxc_gpio_b1_13_gpio2_io29>;
280			drive-strength = "r0-6";
281			bias-pull-up;
282			bias-pull-up-value = "100k";
283			slew-rate = "slow";
284			nxp,speed = "100-mhz";
285		};
286		group1 {
287			pinmux = <&iomuxc_gpio_b1_12_lpuart5_tx>;
288			drive-strength = "r0-6";
289			slew-rate = "slow";
290			nxp,speed = "100-mhz";
291		};
292	};
293
294	/* LPUART6 TX/RX on Teensy-Pins 1/0 */
295	pinmux_lpuart6: pinmux_lpuart6 {
296		group0 {
297			pinmux = <&iomuxc_gpio_ad_b0_03_lpuart6_rx>,
298				<&iomuxc_gpio_ad_b0_02_lpuart6_tx>;
299			drive-strength = "r0-6";
300			slew-rate = "slow";
301			nxp,speed = "100-mhz";
302		};
303	};
304
305	pinmux_lpuart6_sleep: pinmux_lpuart6_sleep {
306		group0 {
307			pinmux = <&iomuxc_gpio_ad_b0_03_gpio1_io03>;
308			drive-strength = "r0-6";
309			bias-pull-up;
310			bias-pull-up-value = "100k";
311			slew-rate = "slow";
312			nxp,speed = "100-mhz";
313		};
314		group1 {
315			pinmux = <&iomuxc_gpio_ad_b0_02_lpuart6_tx>;
316			drive-strength = "r0-6";
317			slew-rate = "slow";
318			nxp,speed = "100-mhz";
319		};
320	};
321
322	/* LPUART7 TX/RX on Teensy-Pins 29/28 */
323	pinmux_lpuart7: pinmux_lpuart7 {
324		group0 {
325			pinmux = <&iomuxc_gpio_emc_31_lpuart7_tx>,
326				<&iomuxc_gpio_emc_32_lpuart7_rx>;
327			drive-strength = "r0-6";
328			slew-rate = "slow";
329			nxp,speed = "100-mhz";
330		};
331	};
332
333	pinmux_lpuart7_sleep: pinmux_lpuart7_sleep {
334		group0 {
335			pinmux = <&iomuxc_gpio_emc_31_gpio4_io31>;
336			drive-strength = "r0-6";
337			bias-pull-up;
338			bias-pull-up-value = "100k";
339			slew-rate = "slow";
340			nxp,speed = "100-mhz";
341		};
342		group1 {
343			pinmux = <&iomuxc_gpio_emc_32_lpuart7_rx>;
344			drive-strength = "r0-6";
345			slew-rate = "slow";
346			nxp,speed = "100-mhz";
347		};
348	};
349
350	/* LPUART8 TX/RX on Teensy-Pins 20/21 */
351	pinmux_lpuart8: pinmux_lpuart8 {
352		group0 {
353			pinmux = <&iomuxc_gpio_ad_b1_11_lpuart8_rx>,
354				<&iomuxc_gpio_ad_b1_10_lpuart8_tx>;
355			drive-strength = "r0-6";
356			slew-rate = "slow";
357			nxp,speed = "100-mhz";
358		};
359	};
360
361	pinmux_lpuart8_sleep: pinmux_lpuart8_sleep {
362		group0 {
363			pinmux = <&iomuxc_gpio_ad_b1_11_gpio1_io27>;
364			drive-strength = "r0-6";
365			bias-pull-up;
366			bias-pull-up-value = "100k";
367			slew-rate = "slow";
368			nxp,speed = "100-mhz";
369		};
370		group1 {
371			pinmux = <&iomuxc_gpio_ad_b1_10_lpuart8_tx>;
372			drive-strength = "r0-6";
373			slew-rate = "slow";
374			nxp,speed = "100-mhz";
375		};
376	};
377
378	pinmux_usdhc1: pinmux_usdhc1 {
379		group0 {
380			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
381			bias-disable;
382			drive-strength = "r0";
383			input-schmitt-enable;
384			slew-rate = "fast";
385			nxp,speed = "100-mhz";
386		};
387		group1 {
388			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
389				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
390				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
391				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
392				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
393			drive-strength = "r0";
394			input-schmitt-enable;
395			bias-pull-up;
396			bias-pull-up-value = "47k";
397			slew-rate = "fast";
398			nxp,speed = "100-mhz";
399		};
400		group2 {
401			pinmux = <&iomuxc_gpio_emc_41_usdhc1_vselect>;
402			drive-strength = "r0-4";
403			input-schmitt-enable;
404			bias-pull-up;
405			bias-pull-up-value = "47k";
406			slew-rate = "fast";
407			nxp,speed = "100-mhz";
408		};
409	};
410
411	/* fast pinmux settings for USDHC (over 100 Mhz) */
412	pinmux_usdhc1_fast: pinmux_usdhc1_fast {
413		group0 {
414			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
415			bias-disable;
416			drive-strength = "r0-7";
417			input-schmitt-enable;
418			slew-rate = "fast";
419			nxp,speed = "200-mhz";
420		};
421		group1 {
422			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
423				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
424				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
425				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
426				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
427			drive-strength = "r0-7";
428			input-schmitt-enable;
429			bias-pull-up;
430			bias-pull-up-value = "47k";
431			slew-rate = "fast";
432			nxp,speed = "200-mhz";
433		};
434	};
435
436	/* medium pinmux settings for USDHC (under 100 Mhz) */
437	pinmux_usdhc1_med: pinmux_usdhc1_med {
438		group0 {
439			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
440			bias-disable;
441			drive-strength = "r0-7";
442			input-schmitt-enable;
443			slew-rate = "fast";
444			nxp,speed = "100-mhz";
445		};
446		group1 {
447			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
448				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
449				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
450				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
451				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
452			drive-strength = "r0-7";
453			input-schmitt-enable;
454			bias-pull-up;
455			bias-pull-up-value = "47k";
456			slew-rate = "fast";
457			nxp,speed = "100-mhz";
458		};
459	};
460
461	/* slow pinmux settings for USDHC (under 50 Mhz) */
462	pinmux_usdhc1_slow: pinmux_usdhc1_slow {
463		group0 {
464			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
465			bias-disable;
466			drive-strength = "r0-7";
467			input-schmitt-enable;
468			slew-rate = "fast";
469			nxp,speed = "50-mhz";
470		};
471		group1 {
472			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
473				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
474				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
475				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
476				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
477			drive-strength = "r0-7";
478			input-schmitt-enable;
479			bias-pull-up;
480			bias-pull-up-value = "47k";
481			slew-rate = "fast";
482			nxp,speed = "50-mhz";
483		};
484	};
485
486};
487
488