1/*
2 * Copyright (c) 2020 Intel Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/f4/stm32f407Xe.dtsi>
9#include <st/f4/stm32f407v(e-g)tx-pinctrl.dtsi>
10#include <zephyr/dt-bindings/input/input-event-codes.h>
11
12/ {
13	model = "black_f407ve board";
14	compatible = "black-stm32f407";
15
16	chosen {
17		zephyr,console = &usart1;
18		zephyr,shell-uart = &usart1;
19		zephyr,sram = &sram0;
20		zephyr,flash = &flash0;
21		zephyr,ccm = &ccm0;
22		zephyr,canbus = &can2;
23	};
24
25	leds {
26		compatible = "gpio-leds";
27		green_led_1: led_1 {
28			gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
29			label = "User LD1";
30		};
31		green_led_2: led_2 {
32			gpios = <&gpioa 7 GPIO_ACTIVE_LOW>;
33			label = "User LD2";
34		};
35	};
36
37	gpio_keys {
38		compatible = "gpio-keys";
39		user_button_0: K0 {
40			label = "Key K0";
41			gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
42			zephyr,code = <INPUT_KEY_0>;
43		};
44		user_button_1: K1 {
45			label = "Key K1";
46			gpios = <&gpioe 3 GPIO_ACTIVE_LOW>;
47			zephyr,code = <INPUT_KEY_1>;
48		};
49		user_button_UP: K_UP {
50			label = "Key WK_UP";
51			gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
52			zephyr,code = <INPUT_KEY_UP>;
53		};
54	};
55
56	aliases {
57		led0 = &green_led_1;
58		led1 = &green_led_2;
59		sw0 = &user_button_UP;
60	};
61};
62
63&clk_lsi {
64	status = "okay";
65};
66
67&clk_hse {
68	clock-frequency = <DT_FREQ_M(8)>;
69	status = "okay";
70};
71
72&pll {
73	div-m = <8>;
74	mul-n = <336>;
75	div-p = <2>;
76	div-q = <7>;
77	clocks = <&clk_hse>;
78	status = "okay";
79};
80
81&rcc {
82	clocks = <&pll>;
83	clock-frequency = <DT_FREQ_M(168)>;
84	ahb-prescaler = <1>;
85	apb1-prescaler = <4>;
86	apb2-prescaler = <2>;
87};
88
89&usart1 {
90	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
91	pinctrl-names = "default";
92	current-speed = <115200>;
93	status = "okay";
94};
95
96&usart2 {
97	pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
98	pinctrl-names = "default";
99	current-speed = <115200>;
100	status = "okay";
101};
102
103&timers2 {
104	status = "okay";
105
106	pwm2: pwm {
107		status = "okay";
108		pinctrl-0 = <&tim2_ch1_pa0>;
109		pinctrl-names = "default";
110	};
111};
112
113&rtc {
114	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
115		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
116	status = "okay";
117};
118
119zephyr_udc0: &usbotg_fs {
120	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
121	pinctrl-names = "default";
122	status = "okay";
123};
124
125&can1 {
126	pinctrl-0 = <&can1_rx_pd0 &can1_tx_pd1>;
127	pinctrl-names = "default";
128	status = "disabled";
129};
130
131&can2 {
132	pinctrl-0 = <&can2_rx_pb12 &can2_tx_pb13>;
133	pinctrl-names = "default";
134	status = "okay";
135};
136
137&spi1 {
138	pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pb5>;
139	pinctrl-names = "default";
140	status = "okay";
141	cs-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
142	w25q16cv: w25q16cv@0 {
143		compatible = "jedec,spi-nor";
144		reg = <0>;
145		spi-max-frequency = <40000000>;
146		size = <0x1000000>;
147		has-dpd;
148		t-enter-dpd = <4000>;
149		t-exit-dpd = <25000>;
150		jedec-id = [ef 40 15];
151	};
152};
153
154&spi2 {
155	pinctrl-0 = <&spi2_sck_pb10 &spi2_miso_pc2 &spi2_mosi_pc3>;
156	pinctrl-names = "default";
157	status = "okay";
158};
159