1/*
2 * Copyright (c) 2017, NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_rt1050.dtsi>
10#include "mimxrt1050_evk-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "NXP MIMXRT1050-EVK board";
15	compatible = "nxp,mimxrt1052";
16
17	aliases {
18		led0 = &green_led;
19		sw0 = &user_button;
20		watchdog0 = &wdog0;
21		magn0 = &fxos8700;
22		accel0 = &fxos8700;
23		sdhc0 = &usdhc1;
24	};
25
26	chosen {
27		zephyr,sram = &sdram0;
28		zephyr,itcm = &itcm;
29		zephyr,dtcm = &dtcm;
30		zephyr,console = &lpuart1;
31		zephyr,shell-uart = &lpuart1;
32	};
33
34	sdram0: memory@80000000 {
35		/* Micron MT48LC16M16A2B4-6AIT:G */
36		device_type = "memory";
37		reg = <0x80000000 DT_SIZE_M(32)>;
38	};
39
40	/*
41	 * This node describes the GPIO pins of the parallel FPC interface,
42	 * This interface is standard to several NXP EVKs, and is used with
43	 * several parallel LCD displays (available as zephyr shields)
44	 */
45	nxp_parallel_lcd_connector: parallel-connector {
46		compatible = "nxp,parallel-lcd-connector";
47		#gpio-cells = <2>;
48		gpio-map-mask = <0xffffffff 0xffffffc0>;
49		gpio-map-pass-thru = <0 0x3f>;
50		gpio-map =	<0  0 &gpio2 31 0>;	/* Pin 1, BL+ */
51	};
52
53	/*
54	 * This node describes the GPIO pins of the I2C display FPC interface,
55	 * This interface is standard to several NXP EVKs, and is used with
56	 * several parallel LCD displays (available as zephyr shields)
57	 */
58	nxp_i2c_touch_fpc: i2c-touch-connector {
59		compatible = "nxp,i2c-tsc-fpc";
60		#gpio-cells = <2>;
61		gpio-map-mask = <0xffffffff 0xffffffc0>;
62		gpio-map-pass-thru = <0 0x3f>;
63		gpio-map =	<1  0 &gpio1 2 0>,	/* Pin 2, LCD touch RST */
64				<2  0 &gpio1 11 0>;	/* Pin 3, LCD touch INT */
65	};
66
67	leds {
68		compatible = "gpio-leds";
69		green_led: led_0 {
70			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
71			label = "User LD1";
72		};
73	};
74
75	gpio_keys {
76		compatible = "gpio-keys";
77		user_button: button_0 {
78			label = "User SW8";
79			gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
80			zephyr,code = <INPUT_KEY_0>;
81		};
82	};
83
84	arduino_header: connector {
85		compatible = "arduino-header-r3";
86		#gpio-cells = <2>;
87		gpio-map-mask = <0xffffffff 0xffffffc0>;
88		gpio-map-pass-thru = <0 0x3f>;
89		gpio-map = <0 0 &gpio1 26 0>,	/* A0 */
90			   <1 0 &gpio1 27 0>,	/* A1 */
91			   <2 0 &gpio1 20 0>,	/* A2 */
92			   <3 0 &gpio1 21 0>,	/* A3 */
93			   <4 0 &gpio1 17 0>,	/* A4 */
94			   <5 0 &gpio1 16 0>,	/* A5 */
95			   <6 0 &gpio1 23 0>,	/* D0 */
96			   <7 0 &gpio1 22 0>,	/* D1 */
97			   <8 0 &gpio1 11 0>,	/* D2 */
98			   <9 0 &gpio1 24 0>,	/* D3 */
99			   <10 0 &gpio1 9 0>,	/* D4 */
100			   <11 0 &gpio1 10 0>,	/* D5 */
101			   <12 0 &gpio1 18 0>,	/* D6 */
102			   <13 0 &gpio1 19 0>,	/* D7 */
103			   <14 0 &gpio1 3 0>,	/* D8 */
104			   <15 0 &gpio1 2 0>,	/* D9 */
105			   <16 0 &gpio3 13 0>,	/* D10 */
106			   <17 0 &gpio3 14 0>,	/* D11 */
107			   <18 0 &gpio3 15 0>,	/* D12 */
108			   <19 0 &gpio3 12 0>,	/* D13 */
109			   <20 0 &gpio1 1 0>,	/* D14 */
110			   <21 0 &gpio1 0 0>;	/* D15 */
111	};
112};
113
114arduino_serial: &lpuart3 {
115	pinctrl-0 = <&pinmux_lpuart3>;
116	pinctrl-1 = <&pinmux_lpuart3_sleep>;
117	pinctrl-names = "default", "sleep";
118};
119
120&adc1 {
121	status = "okay";
122	pinctrl-0 = <&pinmux_adc1>;
123	pinctrl-names = "default";
124};
125
126nxp_touch_i2c: &lpi2c1 {};
127
128zephyr_lcdif: &lcdif {
129	pinctrl-0 = <&pinmux_lcdif>;
130	pinctrl-names = "default";
131};
132
133&lpi2c1 {
134	status = "okay";
135	pinctrl-0 = <&pinmux_lpi2c1>;
136	pinctrl-names = "default";
137
138	fxos8700: fxos8700@1f {
139		compatible = "nxp,fxos8700";
140		reg = <0x1f>;
141
142		/* Two zero ohm resistors (R263 and R264) isolate sensor
143		 * interrupt gpios from the soc and are unpopulated by default.
144		 * Note that if you populate them, they conflict with LCD and
145		 * Ethernet interrupt gpios.
146		 */
147		int1-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
148		int2-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
149	};
150};
151
152&lpuart1 {
153	status = "okay";
154	current-speed = <115200>;
155	pinctrl-0 = <&pinmux_lpuart1>;
156	pinctrl-1 = <&pinmux_lpuart1_sleep>;
157	pinctrl-names = "default", "sleep";
158};
159
160&lpspi1 {
161	status = "okay";
162	/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
163	dmas = <&edma0 0 13>, <&edma0 1 14>;
164	dma-names = "rx", "tx";
165	pinctrl-0 = <&pinmux_lpspi1>;
166	pinctrl-names = "default";
167};
168
169&lpspi3 {
170	status = "okay";
171	/* DMA channels 2 and 3, muxed to LPSPI3 RX and TX */
172	dmas = <&edma0 2 15>, <&edma0 3 16>;
173	dma-names = "rx", "tx";
174	pinctrl-0 = <&pinmux_lpspi3>;
175	pinctrl-names = "default";
176};
177
178&enet_mac {
179	status = "okay";
180	pinctrl-0 = <&pinmux_enet>;
181	pinctrl-names = "default";
182	phy-handle = <&phy>;
183	zephyr,random-mac-address;
184	phy-connection-type = "rmii";
185};
186
187&enet_mdio {
188	status = "okay";
189	pinctrl-0 = <&pinmux_enet_mdio>;
190	pinctrl-names = "default";
191	phy: phy@0 {
192		compatible = "microchip,ksz8081";
193		reg = <0>;
194		status = "okay";
195		reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
196		int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
197		microchip,interface-type = "rmii";
198	};
199};
200
201&enet_ptp_clock {
202	status = "okay";
203	pinctrl-0 = <&pinmux_ptp>;
204	pinctrl-names = "default";
205};
206
207zephyr_udc0: &usb1 {
208	status = "okay";
209};
210
211&usdhc1 {
212	status = "okay";
213	pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
214	cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
215	pinctrl-0 = <&pinmux_usdhc1>;
216	pinctrl-1 = <&pinmux_usdhc1_slow>;
217	pinctrl-2 = <&pinmux_usdhc1_med>;
218	pinctrl-3 = <&pinmux_usdhc1_fast>;
219	pinctrl-names = "default", "slow", "med", "fast";
220	sdmmc {
221		compatible = "zephyr,sdmmc-disk";
222		status = "okay";
223	};
224};
225
226&wdog0 {
227	status = "okay";
228};
229
230&edma0 {
231	status = "okay";
232};
233
234&pxp {
235	status = "okay";
236};
237
238/* GPT and Systick are enabled. If power management is enabled, the GPT
239 * timer will be used instead of systick, as allows the core clock to
240 * be gated.
241 */
242&gpt_hw_timer {
243	status = "okay";
244};
245
246&systick {
247	status = "okay";
248};
249