1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by gen_board_pinctrl.py
6 * from mimxrt1050_evk.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1052dvl6b-pinctrl.dtsi>
10
11&pinctrl {
12	/* ADC1 inputs 0 and 15 */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>,
16				<&iomuxc_gpio_ad_b1_10_adc1_in15>;
17			bias-disable;
18			drive-strength = "r0-6";
19			slew-rate = "slow";
20			nxp,speed = "100-mhz";
21		};
22	};
23
24	/* conflicts with lpuart3 and flexcan1 */
25	pinmux_csi: pinmux_csi {
26		group0 {
27			pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>;
28			drive-strength = "r0-6";
29			bias-pull-down;
30			bias-pull-down-value = "100k";
31			slew-rate = "slow";
32			nxp,speed = "100-mhz";
33		};
34		group1 {
35			pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
36				<&iomuxc_gpio_ad_b1_05_csi_mclk>,
37				<&iomuxc_gpio_ad_b1_06_csi_vsync>,
38				<&iomuxc_gpio_ad_b1_07_csi_hsync>,
39				<&iomuxc_gpio_ad_b1_08_csi_data09>,
40				<&iomuxc_gpio_ad_b1_09_csi_data08>,
41				<&iomuxc_gpio_ad_b1_10_csi_data07>,
42				<&iomuxc_gpio_ad_b1_11_csi_data06>,
43				<&iomuxc_gpio_ad_b1_12_csi_data05>,
44				<&iomuxc_gpio_ad_b1_13_csi_data04>,
45				<&iomuxc_gpio_ad_b1_14_csi_data03>,
46				<&iomuxc_gpio_ad_b1_15_csi_data02>;
47			drive-strength = "r0-6";
48			slew-rate = "slow";
49			nxp,speed = "100-mhz";
50		};
51	};
52
53	pinmux_enet: pinmux_enet {
54		group0 {
55			pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
56			bias-disable;
57			drive-strength = "r0-6";
58			slew-rate = "fast";
59			nxp,speed = "50-mhz";
60			input-enable;
61		};
62		group1 {
63			pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
64				<&iomuxc_gpio_b1_05_enet_rx_data1>,
65				<&iomuxc_gpio_b1_06_enet_rx_en>,
66				<&iomuxc_gpio_b1_07_enet_tx_data0>,
67				<&iomuxc_gpio_b1_08_enet_tx_data1>,
68				<&iomuxc_gpio_b1_09_enet_tx_en>,
69				<&iomuxc_gpio_b1_11_enet_rx_er>;
70			drive-strength = "r0-5";
71			bias-pull-up;
72			bias-pull-up-value = "100k";
73			slew-rate = "fast";
74			nxp,speed = "200-mhz";
75		};
76	};
77
78	pinmux_enet_mdio: pinmux_enet_mdio {
79		group0 {
80			pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
81				<&iomuxc_gpio_emc_41_enet_mdio>,
82				<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
83				<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
84			drive-strength = "r0-5";
85			bias-pull-up;
86			bias-pull-up-value = "100k";
87			slew-rate = "fast";
88			nxp,speed = "200-mhz";
89		};
90	};
91
92	pinmux_ptp: pinmux_ptp {
93		group0 {
94			pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
95				<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
96			drive-strength = "r0-6";
97			slew-rate = "slow";
98			nxp,speed = "100-mhz";
99		};
100	};
101
102	/* conflicts with SAI1 */
103	pinmux_flexcan1: pinmux_flexcan1 {
104		group0 {
105			pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
106				<&iomuxc_gpio_ad_b1_09_flexcan1_rx>;
107			drive-strength = "r0-6";
108			slew-rate = "slow";
109			nxp,speed = "100-mhz";
110		};
111	};
112
113	pinmux_flexcan2: pinmux_flexcan2 {
114		group0 {
115			pinmux = <&iomuxc_gpio_ad_b0_14_flexcan2_tx>,
116				<&iomuxc_gpio_ad_b0_15_flexcan2_rx>;
117			drive-strength = "r0-6";
118			slew-rate = "slow";
119			nxp,speed = "100-mhz";
120		};
121	};
122
123	/* flexpwm output for board LED */
124	pinmux_flexpwm2: pinmux_flexpwm2 {
125		group0 {
126			pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
127			drive-strength = "r0-4";
128			bias-pull-up;
129			bias-pull-up-value = "47k";
130			slew-rate = "slow";
131			nxp,speed = "100-mhz";
132		};
133	};
134
135	pinmux_flexspi1: pinmux_flexspi1 {
136		group0 {
137			pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>;
138			drive-strength = "r0-6";
139			input-schmitt-enable;
140			bias-pull-down;
141			bias-pull-down-value = "100k";
142			slew-rate = "fast";
143			nxp,speed = "200-mhz";
144			input-enable;
145		};
146		group1 {
147			pinmux = <&iomuxc_gpio_sd_b1_03_flexspi_b_data0>,
148				<&iomuxc_gpio_sd_b1_00_flexspi_b_data3>,
149				<&iomuxc_gpio_sd_b1_01_flexspi_b_data2>,
150				<&iomuxc_gpio_sd_b1_02_flexspi_b_data1>,
151				<&iomuxc_gpio_sd_b1_04_flexspi_b_sclk>,
152				<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
153				<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
154				<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
155				<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
156				<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
157				<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
158			drive-strength = "r0-6";
159			slew-rate = "fast";
160			nxp,speed = "200-mhz";
161			input-enable;
162		};
163	};
164
165	/* FLEXSPI A is connected to external flash */
166	pinmux_flexspia: pinmux_flexspia {
167		group0 {
168			pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>,
169				<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
170				<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
171				<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
172				<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
173				<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
174				<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
175			drive-strength = "r0-6";
176			slew-rate = "fast";
177			nxp,speed = "200-mhz";
178		};
179	};
180
181	/* Configures pin routing and optionally pin electrical features. */
182	pinmux_lcdif: pinmux_lcdif {
183		group0 {
184			pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>,
185				<&iomuxc_gpio_b0_01_lcdif_enable>,
186				<&iomuxc_gpio_b0_02_lcdif_hsync>,
187				<&iomuxc_gpio_b0_03_lcdif_vsync>,
188				<&iomuxc_gpio_b0_04_lcdif_data00>,
189				<&iomuxc_gpio_b0_05_lcdif_data01>,
190				<&iomuxc_gpio_b0_06_lcdif_data02>,
191				<&iomuxc_gpio_b0_07_lcdif_data03>,
192				<&iomuxc_gpio_b0_08_lcdif_data04>,
193				<&iomuxc_gpio_b0_09_lcdif_data05>,
194				<&iomuxc_gpio_b0_10_lcdif_data06>,
195				<&iomuxc_gpio_b0_11_lcdif_data07>,
196				<&iomuxc_gpio_b0_12_lcdif_data08>,
197				<&iomuxc_gpio_b0_13_lcdif_data09>,
198				<&iomuxc_gpio_b0_14_lcdif_data10>,
199				<&iomuxc_gpio_b0_15_lcdif_data11>,
200				<&iomuxc_gpio_b1_00_lcdif_data12>,
201				<&iomuxc_gpio_b1_01_lcdif_data13>,
202				<&iomuxc_gpio_b1_02_lcdif_data14>,
203				<&iomuxc_gpio_b1_03_lcdif_data15>;
204			drive-strength = "r0-6";
205			input-schmitt-enable;
206			bias-pull-up;
207			bias-pull-up-value = "100k";
208			slew-rate = "slow";
209			nxp,speed = "100-mhz";
210		};
211		group1 {
212			pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>,
213				<&iomuxc_gpio_b1_15_gpio2_io31>;
214			drive-strength = "r0-6";
215			slew-rate = "slow";
216			nxp,speed = "100-mhz";
217		};
218	};
219
220	pinmux_lpi2c1: pinmux_lpi2c1 {
221		group0 {
222			pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
223				<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
224			drive-strength = "r0-6";
225			drive-open-drain;
226			slew-rate = "slow";
227			nxp,speed = "100-mhz";
228			input-enable;
229		};
230	};
231
232	/* Conflicts with USDHC pins. Connect R278, R279, R280, and R281 on evk board */
233	pinmux_lpspi1: pinmux_lpspi1 {
234		group0 {
235			pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>,
236				<&iomuxc_gpio_sd_b0_00_lpspi1_sck>,
237				<&iomuxc_gpio_sd_b0_03_lpspi1_sdi>,
238				<&iomuxc_gpio_sd_b0_02_lpspi1_sdo>;
239			drive-strength = "r0-6";
240			slew-rate = "slow";
241			nxp,speed = "100-mhz";
242		};
243	};
244
245	/* conflicts with lcdif pins */
246	pinmux_lpspi3: pinmux_lpspi3 {
247		group0 {
248			pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>,
249				<&iomuxc_gpio_ad_b0_00_lpspi3_sck>,
250				<&iomuxc_gpio_ad_b0_02_lpspi3_sdi>,
251				<&iomuxc_gpio_ad_b0_01_lpspi3_sdo>;
252			drive-strength = "r0-6";
253			slew-rate = "slow";
254			nxp,speed = "100-mhz";
255		};
256	};
257
258	pinmux_lpuart1: pinmux_lpuart1 {
259		group0 {
260			pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
261				<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
262			drive-strength = "r0-6";
263			slew-rate = "slow";
264			nxp,speed = "100-mhz";
265		};
266	};
267
268	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
269		group0 {
270			pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
271			drive-strength = "r0";
272			bias-pull-up;
273			bias-pull-up-value = "100k";
274			slew-rate = "slow";
275			nxp,speed = "50-mhz";
276		};
277		group1 {
278			pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
279			drive-strength = "r0-6";
280			slew-rate = "slow";
281			nxp,speed = "100-mhz";
282		};
283	};
284
285	pinmux_lpuart3: pinmux_lpuart3 {
286		group0 {
287			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
288				<&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
289			drive-strength = "r0-6";
290			slew-rate = "slow";
291			nxp,speed = "100-mhz";
292		};
293	};
294
295	/* Flow control for lpuart3 */
296	pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control {
297		group0 {
298			pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
299				<&iomuxc_gpio_ad_b1_07_lpuart3_rx>,
300				<&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>,
301				<&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>;
302			drive-strength = "r0-6";
303			slew-rate = "slow";
304			nxp,speed = "100-mhz";
305		};
306	};
307
308	pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
309		group0 {
310			pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
311			drive-strength = "r0";
312			bias-pull-up;
313			bias-pull-up-value = "100k";
314			slew-rate = "slow";
315			nxp,speed = "100-mhz";
316		};
317		group1 {
318			pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
319			drive-strength = "r0-6";
320			slew-rate = "slow";
321			nxp,speed = "100-mhz";
322		};
323	};
324
325	pinmux_sai1: pinmux_sai1 {
326		group0 {
327			pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,
328				<&iomuxc_gpio_ad_b1_13_sai1_tx_data0>,
329				<&iomuxc_gpio_ad_b1_12_sai1_rx_data0>,
330				<&iomuxc_gpio_ad_b1_14_sai1_tx_bclk>,
331				<&iomuxc_gpio_ad_b1_15_sai1_tx_sync>;
332			drive-strength = "r0-6";
333			slew-rate = "slow";
334			nxp,speed = "100-mhz";
335		};
336	};
337
338	pinmux_usdhc1: pinmux_usdhc1 {
339		group0 {
340			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
341			bias-disable;
342			drive-strength = "r0";
343			input-schmitt-enable;
344			slew-rate = "fast";
345			nxp,speed = "100-mhz";
346		};
347		group1 {
348			pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
349				<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
350				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
351				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
352				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
353				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
354			drive-strength = "r0";
355			input-schmitt-enable;
356			bias-pull-up;
357			bias-pull-up-value = "47k";
358			slew-rate = "fast";
359			nxp,speed = "100-mhz";
360		};
361		group2 {
362			pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
363			drive-strength = "r0-4";
364			input-schmitt-enable;
365			bias-pull-up;
366			bias-pull-up-value = "47k";
367			slew-rate = "fast";
368			nxp,speed = "100-mhz";
369		};
370		group3 {
371			pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
372			drive-strength = "r0-6";
373			slew-rate = "slow";
374			nxp,speed = "100-mhz";
375		};
376	};
377
378	/* fast pinmux settings for USDHC (over 100 Mhz) */
379	pinmux_usdhc1_fast: pinmux_usdhc1_fast {
380		group0 {
381			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
382			bias-disable;
383			drive-strength = "r0-7";
384			input-schmitt-enable;
385			slew-rate = "fast";
386			nxp,speed = "200-mhz";
387		};
388		group1 {
389			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
390				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
391				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
392				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
393				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
394			drive-strength = "r0-7";
395			input-schmitt-enable;
396			bias-pull-up;
397			bias-pull-up-value = "47k";
398			slew-rate = "fast";
399			nxp,speed = "200-mhz";
400		};
401	};
402
403	/* medium pinmux settings for USDHC (under 100 Mhz) */
404	pinmux_usdhc1_med: pinmux_usdhc1_med {
405		group0 {
406			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
407			bias-disable;
408			drive-strength = "r0-7";
409			input-schmitt-enable;
410			slew-rate = "fast";
411			nxp,speed = "100-mhz";
412		};
413		group1 {
414			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
415				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
416				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
417				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
418				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
419			drive-strength = "r0-7";
420			input-schmitt-enable;
421			bias-pull-up;
422			bias-pull-up-value = "47k";
423			slew-rate = "fast";
424			nxp,speed = "100-mhz";
425		};
426	};
427
428	/* slow pinmux settings for USDHC (under 50 Mhz) */
429	pinmux_usdhc1_slow: pinmux_usdhc1_slow {
430		group0 {
431			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
432			bias-disable;
433			drive-strength = "r0-7";
434			input-schmitt-enable;
435			slew-rate = "fast";
436			nxp,speed = "50-mhz";
437		};
438		group1 {
439			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
440				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
441				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
442				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
443				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
444			drive-strength = "r0-7";
445			input-schmitt-enable;
446			bias-pull-up;
447			bias-pull-up-value = "47k";
448			slew-rate = "fast";
449			nxp,speed = "50-mhz";
450		};
451	};
452
453	pinmux_qdec1: pinmux_qdec1 {
454		group0 {
455			pinmux = <&iomuxc_gpio_ad_b0_09_xbar1_xbar_in21>,
456				<&iomuxc_gpio_ad_b0_10_xbar1_xbar_in22>;
457			drive-strength = "r0-6";
458			slew-rate = "slow";
459			nxp,speed = "100-mhz";
460		};
461	};
462};
463
464