1.. _dragino_lsn50_board:
2
3Dragino LSN50 LoRA Sensor Node
4##############################
5
6Overview
7********
8
9The Dragino LSN50 LoRA Sensor Node for IoT allows users to develop
10applications with LoraWAN connectivity via the HopeRF / SX1276/SX1278.
11Dragino LSN50 enables a wide diversity of applications by exploiting
12low-power communication, ARM |reg| Cortex |reg|-M0 core-based
13STM32L0 Series features.
14
15This kit provides:
16
17- STM32L072CZ MCU
18- SX1276/SX1278 LoRa Transceiver
19- Expansion connectors:
20
21        - PMOD
22- Li/SOCI2 Unchargable Battery
23- GPIOs exposed via screw terminals on the carrier board
24- Housing
25
26.. image:: img/dragino_lsn50.jpg
27     :align: center
28     :alt: Dragino LSN50
29
30More information about the board can be found at the `Dragino LSN50 website`_.
31
32Hardware
33********
34
35The STM32L072CZ SoC provides the following hardware IPs:
36
37- Ultra-low-power (down to 0.29 µA Standby mode and 93 uA/MHz run mode)
38- Core: ARM |reg| 32-bit Cortex |reg|-M0+ CPU, frequency up to 32 MHz
39- Clock Sources:
40
41        - 1 to 32 MHz crystal oscillator
42        - 32 kHz crystal oscillator for RTC (LSE)
43        - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
44        - Internal low-power 37 kHz RC ( |plusminus| 5%)
45        - Internal multispeed low-power 65 kHz to 4.2 MHz RC
46- RTC with HW calendar, alarms and calibration
47- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
48- 11x timers:
49
50        - 2x 16-bit with up to 4 channels
51        - 2x 16-bit with up to 2 channels
52        - 1x 16-bit ultra-low-power timer
53        - 1x SysTick
54        - 1x RTC
55        - 2x 16-bit basic for DAC
56        - 2x watchdogs (independent/window)
57- Up to 84 fast I/Os, most 5 V-tolerant.
58- Memories
59
60        - Up to 192 KB Flash, 2 banks read-while-write, proprietary code readout protection
61        - Up to 20 KB of SRAM
62        - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
63- Rich analog peripherals (independent supply)
64
65        - 1x 12-bit ADC 1.14 MSPS
66        - 2x 12-bit DAC
67        - 2x ultra-low-power comparators
68- 11x communication interfaces
69
70        - USB OTG 2.0 full-speed, LPM and BCD
71        - 3x I2C FM+(1 Mbit/s), SMBus/PMBus
72        - 4x USARTs (ISO 7816, LIN, IrDA, modem)
73        - 6x SPIs (4x SPIs with the Quad SPI)
74- 7-channel DMA controller
75- True random number generator
76- CRC calculation unit, 96-bit unique ID
77- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
78
79
80More information about STM32L072CZ can be found here:
81
82        - `STM32L072CZ on www.st.com`_
83        - `STM32L0x2 reference manual`_
84
85Supported Features
86==================
87
88The Zephyr Dragino LSN50 board configuration supports the following hardware features:
89
90+-----------+------------+-------------------------------------+
91| Interface | Controller | Driver/Component                    |
92+===========+============+=====================================+
93| UART      | on-chip    | serial port-polling;                |
94|           |            | serial port-interrupt               |
95+-----------+------------+-------------------------------------+
96| PINMUX    | on-chip    | pinmux                              |
97+-----------+------------+-------------------------------------+
98| GPIO      | on-chip    | gpio                                |
99+-----------+------------+-------------------------------------+
100
101Other hardware features are not yet supported on this Zephyr port.
102
103The default configuration can be found in the defconfig file:
104:zephyr_file:`boards/dragino/lsn50/dragino_lsn50_defconfig`
105
106
107Connections and IOs
108===================
109
110Dragino LSN50 Board has GPIO controllers. These controllers are responsible for pin muxing,
111input/output, pull-up, etc.
112
113Available pins:
114---------------
115
116For detailed information about available pins please refer to `Dragino LSN50 website`_.
117
118Default Zephyr Peripheral Mapping:
119----------------------------------
120
121- UART_1_TX : PB6
122- UART_1_RX : PB7
123- UART_2_TX : PA2
124- UART_2_RX : PA3
125
126System Clock
127------------
128
129Dragino LSN50 System Clock is at 32MHz,
130
131Serial Port
132-----------
133
134Dragino LSN50 board has 2 U(S)ARTs. The Zephyr console output is assigned to UART1.
135Default settings are 115200 8N1.
136
137Programming and Debugging
138*************************
139
140Applications for the ``dragino_lsn50`` board configuration can be built and
141flashed in the usual way (see :ref:`build_an_application` and
142:ref:`application_run` for more details).
143
144Flashing
145========
146
147Dragino LSN50  board requires an external debugger.
148
149Flashing an application to Dragino LSN50
150----------------------------------------
151
152Here is an example for the :ref:`hello_world` application.
153
154Connect the Dragino LSN50 to a STLinkV2 to your host computer using the USB port, then
155run a serial host program to connect with your board. For example:
156
157.. code-block:: console
158
159   $ minicom -D /dev/ttyACM0
160
161Then build and flash the application:
162
163.. zephyr-app-commands::
164   :zephyr-app: samples/hello_world
165   :board: dragino_lsn50
166   :goals: build flash
167
168You should see the following message on the console:
169
170.. code-block:: console
171
172   $ Hello World! arm
173
174Debugging
175=========
176
177You can debug an application in the usual way.  Here is an example for the
178:ref:`hello_world` application.
179
180.. zephyr-app-commands::
181   :zephyr-app: samples/hello_world
182   :board: dragino_lsn50
183   :maybe-skip-config:
184   :goals: debug
185
186.. _Dragino LSN50 website:
187   https://www.dragino.com/products/lora-lorawan-end-node/item/128-lsn50.html
188
189.. _STM32L072CZ on www.st.com:
190   https://www.st.com/en/microcontrollers/stm32l072cz.html
191
192.. _STM32L0x2 reference manual:
193   https://www.st.com/resource/en/reference_manual/DM00108281.pdf
194