1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 7)>,
10				<NRF_PSEL(UART_RX, 0, 6)>;
11		};
12	};
13
14	uart0_sleep: uart0_sleep {
15		group1 {
16			psels = <NRF_PSEL(UART_TX, 0, 7)>,
17				<NRF_PSEL(UART_RX, 0, 6)>;
18			low-power-enable;
19		};
20	};
21
22	uart1_default: uart1_default {
23		group1 {
24			psels = <NRF_PSEL(UART_RX, 0, 20)>,
25				<NRF_PSEL(UART_TX, 0, 24)>,
26				<NRF_PSEL(UART_RTS, 0, 17)>,
27				<NRF_PSEL(UART_CTS, 0, 16)>;
28		};
29	};
30
31	uart1_sleep: uart1_sleep {
32		group1 {
33			psels = <NRF_PSEL(UART_RX, 0, 20)>,
34				<NRF_PSEL(UART_TX, 0, 24)>,
35				<NRF_PSEL(UART_RTS, 0, 17)>,
36				<NRF_PSEL(UART_CTS, 0, 16)>;
37			low-power-enable;
38		};
39	};
40
41	i2c0_default: i2c0_default {
42		group1 {
43			psels = <NRF_PSEL(TWIM_SDA, 0, 27)>,
44				<NRF_PSEL(TWIM_SCL, 0, 26)>;
45		};
46	};
47
48	i2c0_sleep: i2c0_sleep {
49		group1 {
50			psels = <NRF_PSEL(TWIM_SDA, 0, 27)>,
51				<NRF_PSEL(TWIM_SCL, 0, 26)>;
52			low-power-enable;
53		};
54	};
55
56	spi2_default: spi2_default {
57		group1 {
58			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
59				<NRF_PSEL(SPIM_MOSI, 0, 23)>,
60				<NRF_PSEL(SPIM_MISO, 0, 21)>;
61		};
62	};
63
64	spi2_sleep: spi2_sleep {
65		group1 {
66			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
67				<NRF_PSEL(SPIM_MOSI, 0, 23)>,
68				<NRF_PSEL(SPIM_MISO, 0, 21)>;
69			low-power-enable;
70		};
71	};
72
73};
74