1/*
2 * Copyright (c) 2019 Benjamin Valentin
3 * Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/dts-v1/;
9#include <atmel/samr21.dtsi>
10#include <atmel/samx2xx18.dtsi>
11#include "samr21_xpro-pinctrl.dtsi"
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13
14/ {
15	model = "SAM R21 Xplained Pro";
16	compatible = "samr21,xpro", "atmel,samr21g18a", "atmel,samr21";
17
18	chosen {
19		zephyr,console = &sercom0;
20		zephyr,shell-uart = &sercom0;
21		zephyr,sram = &sram0;
22		zephyr,flash = &flash0;
23		zephyr,ieee802154 = &ieee802154;
24	};
25
26	/* These aliases are provided for compatibility with samples */
27	aliases {
28		led0 = &led0;
29		pwm-led0 = &pwm_led0;
30		sw0 = &user_button;
31		i2c-0 = &sercom1;
32	};
33
34	leds {
35		compatible = "gpio-leds";
36		led0: led_0 {
37			gpios = <&porta 19 GPIO_ACTIVE_LOW>;
38			label = "Yellow LED";
39		};
40	};
41
42	pwmleds {
43		compatible = "pwm-leds";
44		pwm_led0: pwm_led_0 {
45			pwms = <&tcc0 3 PWM_MSEC(20)>;
46		};
47	};
48
49	buttons {
50		compatible = "gpio-keys";
51		user_button: button_0 {
52			gpios = <&porta 28 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
53			label = "SW0";
54			zephyr,code = <INPUT_KEY_0>;
55		};
56	};
57
58	ext1_header: xplained-pro-connector1 {
59		compatible = "atmel-xplained-pro-header";
60		#gpio-cells = <2>;
61		gpio-map-mask = <0xffffffff 0xffffffc0>;
62		gpio-map-pass-thru = <0 0x3f>;		/*           Shared */
63		gpio-map =	<0  0 &porta  6 0>,	/* ADC6             */
64				<1  0 &porta  7 0>,	/* ADC7             */
65				<2  0 &porta 13 0>,	/* GPIO             */
66				<3  0 &porta 28 0>,	/* GPIO             */
67				<4  0 &porta 18 0>,	/* PWM_T0_W2        */
68				<5  0 &porta 19 0>,	/* PWM_T0_W3        */
69				<6  0 &porta 22 0>,	/* GPIO             */
70				<7  0 &porta 23 0>,	/* GPIO             */
71				<8  0 &porta 16 0>,	/* TWD1        EXT2 */
72				<9  0 &porta 17 0>,	/* TWCK1       EXT2 */
73				<10 0 &porta  5 0>,	/* RXD0             */
74				<11 0 &porta  4 0>,	/* TXD0             */
75				<12 0 &portb  3 0>,	/* SPI5(SS)         */
76				<13 0 &portb 22 0>,	/* SPI5(MOSI)  EXTx */
77				<14 0 &portb  2 0>,	/* SPI5(MISO)  EXTx */
78				<15 0 &portb 23 0>;	/* SPI5(SCK)   EXTx */
79	};
80
81	ext2_header: xplained-pro-connector2 {
82		compatible = "atmel-xplained-pro-header";
83		#gpio-cells = <2>;
84		gpio-map-mask = <0xffffffff 0xffffffc0>;
85		gpio-map-pass-thru = <0 0x3f>;		/*           Shared */
86		gpio-map =    /*<0  0 -      - 0>,	   -                */
87			      /*<1  0 -      - 0>,	   -                */
88				<2  0 &porta 15 0>,	/* GPIO             */
89			      /*<3  0 -      - 0>,	   -                */
90			      /*<4  0 -      - 0>,	   -                */
91			      /*<5  0 -      - 0>,	   -                */
92			      /*<6  0 -      - 0>,	   -                */
93				<7  0 &porta  8 0>,	/* GPIO             */
94				<8  0 &porta 16 0>,	/* TWD1        EXT1 */
95				<9  0 &porta 17 0>,	/* TWCK1       EXT1 */
96			      /*<11 0 -      - 0>,	   -                */
97			      /*<12 0 -      - 0>,	   -                */
98				<12 0 &porta 14 0>,	/* GPIO             */
99				<13 0 &portb 22 0>,	/* SPI5(MOSI)  EXTx */
100				<14 0 &portb  2 0>,	/* SPI5(MISO)  EXTx */
101				<15 0 &portb 23 0>;	/* SPI5(SCK)   EXTx */
102	};
103};
104
105&cpu0 {
106	clock-frequency = <48000000>;
107};
108
109&tcc0 {
110	status = "okay";
111	compatible = "atmel,sam0-tcc-pwm";
112	prescaler = <4>;
113	#pwm-cells = <2>;
114
115	pinctrl-0 = <&pwm_default>;
116	pinctrl-names = "default";
117};
118
119&sercom0 {
120	status = "okay";
121	compatible = "atmel,sam0-uart";
122	current-speed = <115200>;
123	rxpo = <1>;
124	txpo = <0>;
125
126	pinctrl-0 = <&sercom0_uart_default>;
127	pinctrl-names = "default";
128};
129
130&sercom1 {
131	status = "okay";
132	compatible = "atmel,sam0-i2c";
133	clock-frequency = <I2C_BITRATE_FAST>;
134	#address-cells = <1>;
135	#size-cells = <0>;
136
137	pinctrl-0 = <&sercom1_i2c_default>;
138	pinctrl-names = "default";
139};
140
141&sercom4 {
142	status = "okay";
143	compatible = "atmel,sam0-spi";
144	/*
145	 *	CS-PB31; MOSI-PB30; MISO-PC19; SCLK-PC18
146	 *	PAD[1]; PAD[2]; PAD[0]; PAD[3]
147	 */
148	dipo = <0>;
149	dopo = <1>;
150	#address-cells = <1>;
151	#size-cells = <0>;
152
153	pinctrl-0 = <&sercom4_spi_default>;
154	pinctrl-names = "default";
155
156	cs-gpios = <&portb 31 GPIO_ACTIVE_LOW>;
157
158	ieee802154: rf2xx@0 {
159		compatible = "atmel,rf2xx";
160		reg = <0x0>;
161		spi-max-frequency = <6000000>;
162		irq-gpios = <&portb 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
163		reset-gpios = <&portb 15 GPIO_ACTIVE_LOW>;
164		slptr-gpios = <&porta 20 GPIO_ACTIVE_HIGH>;
165		dig2-gpios = <&portb 17 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
166		status = "okay";
167		tx-pwr-min = [01 11];	/* -17.0 dBm */
168		tx-pwr-max = [00 04];	/*   4.0 dBm */
169		tx-pwr-table = [00 01 03 04 05 05 06 06
170				07 07 07 08 08 09 09 0a
171				0a 0a 0b 0b 0b 0b 0c 0c
172				0c 0c 0d 0d 0d 0d 0d 0d
173				0d 0d 0e 0e 0e 0e 0e 0e
174				0e 0e 0e 0e 0e 0e 0f 0f];
175	};
176};
177
178&sercom5 {
179	status = "okay";
180	compatible = "atmel,sam0-spi";
181	dipo = <0>;
182	dopo = <2>;
183	#address-cells = <1>;
184	#size-cells = <0>;
185
186	pinctrl-0 = <&sercom5_spi_default>;
187	pinctrl-names = "default";
188};
189
190zephyr_udc0: &usb0 {
191	status = "okay";
192
193	pinctrl-0 = <&usb_dc_default>;
194	pinctrl-names = "default";
195};
196
197ext1_spi: &sercom5 {
198};
199
200ext1_i2c: &sercom1 {
201};
202
203ext1_serial: &sercom0 {
204};
205
206ext2_spi: &sercom5 {
207};
208
209ext2_i2c: &sercom1 {
210};
211
212&flash0 {
213	partitions {
214		compatible = "fixed-partitions";
215		#address-cells = <1>;
216		#size-cells = <1>;
217
218		/*
219		 * The final 16 KiB is reserved for the application.
220		 * Storage partition will be used by FCB/LittleFS/NVS
221		 * if enabled.
222		 */
223		storage_partition: partition@3c000 {
224			label = "storage";
225			reg = <0x0003c000 0x00004000>;
226		};
227	};
228};
229