1/*
2 * Copyright (c) 2019 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7sysclk: system-clock {
8	compatible = "fixed-clock";
9	clock-frequency = <25000000>;
10	#clock-cells = <0>;
11};
12
13timer0: timer@0 {
14	compatible = "arm,cmsdk-timer";
15	reg = <0x0 0x1000>;
16	interrupts = <3 3>;
17};
18
19timer1: timer@1000 {
20	compatible = "arm,cmsdk-timer";
21	reg = <0x1000 0x1000>;
22	interrupts = <4 3>;
23};
24
25dtimer0: dtimer@2000 {
26	compatible = "arm,cmsdk-dtimer";
27	reg = <0x2000 0x1000>;
28	interrupts = <5 3>;
29};
30
31mhu0: mhu@3000 {
32	compatible = "arm,mhu";
33	reg = <0x3000 0x1000>;
34	interrupts = <6 3>;
35};
36
37mhu1: mhu@4000 {
38	compatible = "arm,mhu";
39	reg = <0x4000 0x1000>;
40	interrupts = <7 3>;
41};
42
43gpio0: gpio@100000 {
44	compatible = "arm,cmsdk-gpio";
45	reg = <0x100000 0x1000>;
46	interrupts = <68 3>;
47	gpio-controller;
48	#gpio-cells = <2>;
49};
50
51gpio1: gpio@101000 {
52	compatible = "arm,cmsdk-gpio";
53	reg = <0x101000 0x1000>;
54	interrupts = <69 3>;
55	gpio-controller;
56	#gpio-cells = <2>;
57};
58
59gpio2: gpio@102000 {
60	compatible = "arm,cmsdk-gpio";
61	reg = <0x102000 0x1000>;
62	interrupts = <70 3>;
63	gpio-controller;
64	#gpio-cells = <2>;
65};
66
67gpio3: gpio@103000 {
68	compatible = "arm,cmsdk-gpio";
69	reg = <0x103000 0x1000>;
70	interrupts = <71 3>;
71	gpio-controller;
72	#gpio-cells = <2>;
73};
74
75wdog0: wdog@81000 {
76	compatible = "arm,cmsdk-watchdog";
77	reg = <0x81000 0x1000>;
78	clocks = <&sysclk>;
79};
80
81uart0: uart@200000 {
82	compatible = "arm,cmsdk-uart";
83	reg = <0x200000 0x1000>;
84	interrupts = <33 3 32 3>;
85	interrupt-names = "tx", "rx";
86	clocks = <&sysclk>;
87	current-speed = <115200>;
88};
89
90uart1: uart@201000 {
91	compatible = "arm,cmsdk-uart";
92	reg = <0x201000 0x1000>;
93	interrupts = <35 3 34 3>;
94	interrupt-names = "tx", "rx";
95	clocks = <&sysclk>;
96	current-speed = <115200>;
97};
98
99uart2: uart@202000 {
100	compatible = "arm,cmsdk-uart";
101	reg = <0x202000 0x1000>;
102	interrupts = <37 3 36 3>;
103	interrupt-names = "tx", "rx";
104	clocks = <&sysclk>;
105	current-speed = <115200>;
106};
107
108uart3: uart@203000 {
109	compatible = "arm,cmsdk-uart";
110	reg = <0x203000 0x1000>;
111	interrupts = <39 3 38 3>;
112	interrupt-names = "tx", "rx";
113	clocks = <&sysclk>;
114	current-speed = <115200>;
115};
116
117uart4: uart@204000 {
118	compatible = "arm,cmsdk-uart";
119	reg = <0x204000 0x1000>;
120	interrupts = <41 3 40 3>;
121	interrupt-names = "tx", "rx";
122	clocks = <&sysclk>;
123	current-speed = <115200>;
124};
125
126i2c_touch: i2c@207000 {
127	compatible = "arm,versatile-i2c";
128	clock-frequency = <I2C_BITRATE_STANDARD>;
129	#address-cells = <1>;
130	#size-cells = <0>;
131	reg = <0x207000 0x1000>;
132};
133
134i2c_audio_conf: i2c@208000 {
135	compatible = "arm,versatile-i2c";
136	clock-frequency = <I2C_BITRATE_STANDARD>;
137	#address-cells = <1>;
138	#size-cells = <0>;
139	reg = <0x208000 0x1000>;
140};
141
142i2c_shield0: i2c@20c000 {
143	compatible = "arm,versatile-i2c";
144	clock-frequency = <I2C_BITRATE_STANDARD>;
145	#address-cells = <1>;
146	#size-cells = <0>;
147	reg = <0x20c000 0x1000>;
148};
149
150i2c_shield1: i2c@20d000 {
151	compatible = "arm,versatile-i2c";
152	clock-frequency = <I2C_BITRATE_STANDARD>;
153	#address-cells = <1>;
154	#size-cells = <0>;
155	reg = <0x20d000 0x1000>;
156};
157
158gpio_led0: mps2_fpgaio@302000 {
159	compatible = "arm,mps2-fpgaio-gpio";
160
161	reg = <0x302000 0x4>;
162	gpio-controller;
163	#gpio-cells = <1>;
164	ngpios = <2>;
165};
166
167gpio_button: mps2_fpgaio@302008 {
168	compatible = "arm,mps2-fpgaio-gpio";
169
170	reg = <0x302008 0x4>;
171	gpio-controller;
172	#gpio-cells = <1>;
173	ngpios = <2>;
174};
175
176gpio_misc: mps2_fpgaio@30204c {
177	compatible = "arm,mps2-fpgaio-gpio";
178
179	reg = <0x30204c 0x4>;
180	gpio-controller;
181	#gpio-cells = <1>;
182	ngpios = <10>;
183};
184
185eth0: eth@2000000 {
186	/* Linux has "smsc,lan9115" */
187	compatible = "smsc,lan9220";
188	/* Actual reg range is ~0x200 */
189	reg = <0x2000000 0x100000>;
190	interrupts = <48 3>;
191};
192