1 /*
2  * Copyright (c) 2018 Yurii Hamann
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32F7 processor
10  */
11 
12 #include <zephyr/kernel.h>
13 #include <zephyr/device.h>
14 #include <zephyr/init.h>
15 #include <zephyr/cache.h>
16 #include <soc.h>
17 
18 #include <cmsis_core.h>
19 #include <stm32_ll_system.h>
20 
21 /**
22  * @brief Perform basic hardware initialization at boot.
23  *
24  * This needs to be run from the very beginning.
25  * So the init priority has to be 0 (zero).
26  *
27  * @return 0
28  */
st_stm32f7_init(void)29 static int st_stm32f7_init(void)
30 {
31 	/* Enable ART Flash cache accelerator */
32 	LL_FLASH_EnableART();
33 
34 	sys_cache_instr_enable();
35 	sys_cache_data_enable();
36 
37 	/* Update CMSIS SystemCoreClock variable (HCLK) */
38 	/* At reset, system core clock is set to 16 MHz from HSI */
39 	SystemCoreClock = 16000000;
40 
41 	return 0;
42 }
43 
44 SYS_INIT(st_stm32f7_init, PRE_KERNEL_1, 0);
45