1 /* 2 * Copyright (c) 2016-2017 Piotr Mienkowski 3 * Copyright (c) 2021 ATL Electronics 4 * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or 5 * an affiliate of Cypress Semiconductor Corporation 6 * 7 * SPDX-License-Identifier: Apache-2.0 8 * 9 */ 10 11 /** 12 * @brief Infineon CAT1 SoC specific helpers for pinctrl driver. 13 */ 14 15 #ifndef ZEPHYR_SOC_ARM_INFINEON_CAT1_COMMON_PINCTRL_SOC_H_ 16 #define ZEPHYR_SOC_ARM_INFINEON_CAT1_COMMON_PINCTRL_SOC_H_ 17 18 #include <stdint.h> 19 #include <zephyr/devicetree.h> 20 21 #ifdef __cplusplus 22 extern "C" { 23 #endif 24 25 /** @cond INTERNAL_HIDDEN */ 26 27 /** 28 * Bit definition in PINMUX field 29 */ 30 #define SOC_PINMUX_PORT_POS (0) 31 #define SOC_PINMUX_PORT_MASK (0xFFul << SOC_PINMUX_PORT_POS) 32 #define SOC_PINMUX_PIN_POS (8) 33 #define SOC_PINMUX_PIN_MASK (0xFFul << SOC_PINMUX_PIN_POS) 34 #define SOC_PINMUX_HSIOM_FUNC_POS (16) 35 #define SOC_PINMUX_HSIOM_MASK (0xFFul << SOC_PINMUX_HSIOM_FUNC_POS) 36 #define SOC_PINMUX_SIGNAL_POS (24) 37 #define SOC_PINMUX_SIGNAL_MASK (0xFFul << SOC_PINMUX_SIGNAL_POS) 38 39 /* 40 * Pin flags/attributes 41 */ 42 #define SOC_GPIO_DEFAULT (0) 43 #define SOC_GPIO_FLAGS_POS (0) 44 #define SOC_GPIO_FLAGS_MASK (0x3F << SOC_GPIO_FLAGS_POS) 45 #define SOC_GPIO_PULLUP_POS (0) 46 #define SOC_GPIO_PULLUP (1 << SOC_GPIO_PULLUP_POS) 47 #define SOC_GPIO_PULLDOWN_POS (1) 48 #define SOC_GPIO_PULLDOWN (1 << SOC_GPIO_PULLDOWN_POS) 49 #define SOC_GPIO_OPENDRAIN_POS (2) 50 #define SOC_GPIO_OPENDRAIN (1 << SOC_GPIO_OPENDRAIN_POS) 51 #define SOC_GPIO_OPENSOURCE_POS (3) 52 #define SOC_GPIO_OPENSOURCE (1 << SOC_GPIO_OPENSOURCE_POS) 53 54 /* Push-Pull means Strong, see dts/pinctrl/pincfg-node.yaml */ 55 #define SOC_GPIO_PUSHPULL_POS (4) 56 #define SOC_GPIO_PUSHPULL (1 << SOC_GPIO_PUSHPULL_POS) 57 58 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */ 59 #define SOC_GPIO_INPUTENABLE_POS (5) 60 #define SOC_GPIO_INPUTENABLE (1 << SOC_GPIO_INPUTENABLE_POS) 61 62 #define SOC_GPIO_HIGHZ_POS (6) 63 #define SOC_GPIO_HIGHZ (1 << SOC_GPIO_HIGHZ_POS) 64 65 /** Type for CAT1 Soc pin. */ 66 typedef struct { 67 /** 68 * Pinmux settings (port, pin and function). 69 * [0..7] - Port nunder 70 * [8..15] - Pin number 71 * [16..23]- HSIOM function 72 */ 73 uint32_t pinmux; 74 75 /** Pin configuration (bias, drive and slew rate). */ 76 uint32_t pincfg; 77 } pinctrl_soc_pin_t; 78 79 #define CAT1_PINMUX_GET_PORT_NUM(pinmux) \ 80 (((pinmux) & SOC_PINMUX_PORT_MASK) >> SOC_PINMUX_PORT_POS) 81 #define CAT1_PINMUX_GET_PIN_NUM(pinmux) \ 82 (((pinmux) & SOC_PINMUX_PIN_MASK) >> SOC_PINMUX_PIN_POS) 83 #define CAT1_PINMUX_GET_HSIOM_FUNC(pinmux) \ 84 (((pinmux) & SOC_PINMUX_HSIOM_MASK) >> SOC_PINMUX_HSIOM_FUNC_POS) 85 86 /** 87 * @brief Utility macro to initialize pinmux field in #pinctrl_pin_t. 88 * @param node_id Node identifier. 89 */ 90 #define Z_PINCTRL_CAT1_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux) 91 92 /** 93 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t. 94 * @param node_id Node identifier. 95 */ 96 #define Z_PINCTRL_CAT1_PINCFG_INIT(node_id) ( \ 97 (DT_PROP(node_id, bias_pull_up) << SOC_GPIO_PULLUP_POS) | \ 98 (DT_PROP(node_id, bias_pull_down) << SOC_GPIO_PULLDOWN_POS) | \ 99 (DT_PROP(node_id, drive_open_drain) << SOC_GPIO_OPENDRAIN_POS) | \ 100 (DT_PROP(node_id, drive_open_source) << SOC_GPIO_OPENSOURCE_POS) | \ 101 (DT_PROP(node_id, drive_push_pull) << SOC_GPIO_PUSHPULL_POS) | \ 102 (DT_PROP(node_id, input_enable) << SOC_GPIO_INPUTENABLE_POS) | \ 103 (DT_PROP(node_id, bias_high_impedance) << SOC_GPIO_HIGHZ_POS)) 104 105 /** 106 * @brief Utility macro to initialize each pin. 107 * 108 * @param node_id Node identifier. 109 * @param state_prop State property name. 110 * @param idx State property entry index. 111 */ 112 #define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \ 113 { .pinmux = Z_PINCTRL_CAT1_PINMUX_INIT( \ 114 DT_PROP_BY_IDX(node_id, state_prop, idx)), \ 115 .pincfg = Z_PINCTRL_CAT1_PINCFG_INIT( \ 116 DT_PROP_BY_IDX(node_id, state_prop, idx)) }, 117 118 /** 119 * @brief Utility macro to initialize state pins contained in a given property. 120 * 121 * @param node_id Node identifier. 122 * @param prop Property name describing state pins. 123 */ 124 #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ 125 { DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) } 126 127 /** @endcond */ 128 129 #ifdef __cplusplus 130 } 131 #endif 132 133 #endif /* ZEPHYR_SOC_ARM_INFINEON_CAT1_COMMON_PINCTRL_SOC_H_ */ 134
