1# SPDX-License-Identifier: Apache-2.0
2
3if SOC_SERIES_SAMD20 || SOC_SERIES_SAMD21 || SOC_SERIES_SAMR21
4
5config SOC_ATMEL_SAMD_NVM_WAIT_STATES
6	int "NVM wait states"
7	default 1
8	help
9	  Wait states to set for NVM. Consult the datasheet as these are highly
10	  dependent on the device operationg conditions.
11
12config SOC_ATMEL_SAMD_OSC32K
13	bool "Internal 32.768 kHz RC oscillator"
14	help
15	  Enable the internal 32.768 kHz RC oscillator at startup.
16	  This can then be selected as the main clock reference for the SOC.
17
18config SOC_ATMEL_SAMD_OSC8M
19	bool "Internal 8 MHz RC oscillator"
20	help
21	  Enable the internal 8 MHz RC oscillator at startup.
22	  This can then be selected as the main clock reference for the SOC.
23
24config SOC_ATMEL_SAMD_XOSC32K
25	bool "External 32.768 kHz clock source"
26	help
27	  Enable the external 32.768 kHz clock source at startup.
28	  This can then be selected as the main clock reference for the SOC.
29
30config SOC_ATMEL_SAMD_XOSC32K_CRYSTAL
31	bool "External 32.768 kHz clock is a crystal oscillator"
32	depends on SOC_ATMEL_SAMD_XOSC32K
33	default y
34	help
35	  Enable the crystal oscillator (if disabled, expect a clock signal on
36	  XIN32).
37
38config SOC_ATMEL_SAMD_XOSC
39	bool "External 0.4..32 MHz clock source"
40	help
41	  Enable the external 0.4..32 MHz clock source at startup.
42	  This can then be selected as the main clock reference for the SOC.
43
44config SOC_ATMEL_SAMD_XOSC_CRYSTAL
45	bool "External 0.4..32 MHz clock is a crystal oscillator"
46	depends on SOC_ATMEL_SAMD_XOSC
47	default y
48	help
49	  Enable the crystal oscillator (if disabled, expect a clock signal on
50	  XIN).
51
52config SOC_ATMEL_SAMD_XOSC_FREQ_HZ
53	int "External 0.4..32 MHz clock oscillator frequency"
54	range 400000 32000000
55	default 8000000
56	depends on SOC_ATMEL_SAMD_XOSC
57	help
58	  External 0.4..32 MHz clock oscillator reference frequency.
59
60choice
61	prompt "Main clock reference"
62	default SOC_ATMEL_SAMD_DEFAULT_AS_MAIN
63	help
64	  Selects the clock that will be used for the DFLL48M's reference.
65	  Main clocks, such as the CPU and AHB clocks will be derived from
66	  DFLL48M.
67
68config SOC_ATMEL_SAMD_DEFAULT_AS_MAIN
69	bool "DEFAULT"
70	help
71	  This choice will leave all clocks to their current state.
72	  This can be the default reset state or a state set by a bootloader.
73
74config SOC_ATMEL_SAMD_OSC32K_AS_MAIN
75	bool "OSC32K"
76	depends on SOC_ATMEL_SAMD_OSC32K
77
78config SOC_ATMEL_SAMD_XOSC32K_AS_MAIN
79	bool "XOSC32K"
80	depends on SOC_ATMEL_SAMD_XOSC32K
81
82config SOC_ATMEL_SAMD_OSC8M_AS_MAIN
83	bool "OSC8M"
84	depends on SOC_ATMEL_SAMD_OSC8M
85
86config SOC_ATMEL_SAMD_XOSC_AS_MAIN
87	bool "XOSC"
88	depends on SOC_ATMEL_SAMD_XOSC
89
90endchoice
91
92endif # SOC_SERIES_SAMD20 || SOC_SERIES_SAMD21 || SOC_SERIES_SAMR21
93