1# Copyright (c) 2021 Synopsys, Inc.
2# SPDX-License-Identifier: Apache-2.0
3
4if SOC_NSIM_HS6X_SMP
5
6config CPU_HS6X
7	default y
8
9config NUM_IRQ_PRIO_LEVELS
10	# This processor supports 16 priority levels:
11	default 2
12
13config NUM_IRQS
14	# must be > the highest interrupt number used
15	default 30
16
17config SYS_CLOCK_HW_CYCLES_PER_SEC
18	# SMP simulation is slower than single core, 1 Mhz seems reasonable match with wallclock
19	default 1000000
20
21config CACHE_MANAGEMENT
22	default y
23
24config ARC_CONNECT
25	default y
26
27config MP_MAX_NUM_CPUS
28	default 2
29
30endif # SOC_NSIM_HS6X_SMP
31