1 /* 2 * Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef ZEPHYR_INCLUDE_ARCH_ARM64_MM_H_ 7 #define ZEPHYR_INCLUDE_ARCH_ARM64_MM_H_ 8 9 #if defined(CONFIG_ARM_MMU) 10 #include <zephyr/arch/arm64/arm_mmu.h> 11 /* 12 * When mmu enabled, some section addresses need to be aligned with 13 * page size which is CONFIG_MMU_PAGE_SIZE 14 */ 15 #define MEM_DOMAIN_ALIGN_AND_SIZE CONFIG_MMU_PAGE_SIZE 16 #elif defined(CONFIG_ARM_MPU) 17 #include <zephyr/arch/arm64/cortex_r/arm_mpu.h> 18 /* 19 * When mpu enabled, some section addresses need to be aligned with 20 * mpu region min align size which is 21 * CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE 22 */ 23 #define MEM_DOMAIN_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE 24 #endif 25 26 #ifndef _ASMLANGUAGE 27 28 struct k_thread; 29 void z_arm64_thread_mem_domains_init(struct k_thread *thread); 30 void z_arm64_swap_mem_domains(struct k_thread *thread); 31 32 #endif /* _ASMLANGUAGE */ 33 34 #endif /* ZEPHYR_INCLUDE_ARCH_ARM64_MM_H_ */ 35
