1/*
2 * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#include <mem.h>
7#include <xtensa/xtensa.dtsi>
8#include <zephyr/dt-bindings/adc/adc.h>
9#include <zephyr/dt-bindings/gpio/gpio.h>
10#include <zephyr/dt-bindings/i2c/i2c.h>
11#include <zephyr/dt-bindings/clock/esp32s3_clock.h>
12#include <zephyr/dt-bindings/interrupt-controller/esp32s3-xtensa-intmux.h>
13#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
14
15/ {
16
17	aliases {
18		die-temp0 = &coretemp;
19	};
20
21	chosen {
22		zephyr,canbus = &twai;
23		zephyr,entropy = &trng0;
24		zephyr,flash-controller = &flash;
25	};
26
27	cpus {
28		#address-cells = <1>;
29		#size-cells = <0>;
30
31		cpu0: cpu@0 {
32			device_type = "cpu";
33			compatible = "cdns,tensilica-xtensa-lx7";
34			reg = <0>;
35		};
36
37		cpu1: cpu@1 {
38			device_type = "cpu";
39			compatible = "cdns,tensilica-xtensa-lx7";
40			reg = <1>;
41		};
42
43	};
44
45	wifi: wifi {
46		compatible = "espressif,esp32-wifi";
47		status = "disabled";
48	};
49
50	pinctrl: pin-controller {
51		compatible = "espressif,esp32-pinctrl";
52		status = "okay";
53	};
54
55	soc {
56		#address-cells = <1>;
57		#size-cells = <1>;
58		compatible = "simple-bus";
59		ranges;
60
61		sram0: memory@3fc88000 {
62			compatible = "mmio-sram";
63			reg = <0x3fc88000 0x77FFF>;
64		};
65
66		ipmmem0: memory@3fcbd000 {
67			compatible = "mmio-sram";
68			reg = <0x3fcbd000 0x400>;
69		};
70
71		shm0: memory@3fcbd400 {
72			compatible = "mmio-sram";
73			reg = <0x3fcbd400 0x4000>;
74		};
75
76		intc: interrupt-controller@600c2000 {
77			#interrupt-cells = <1>;
78			compatible = "espressif,esp32-intc";
79			interrupt-controller;
80			reg = <0x600c2000 0x1000>;
81			status = "okay";
82		};
83
84		rtc: rtc@60021000 {
85			compatible = "espressif,esp32-rtc";
86			reg = <0x60021000 0x2000>;
87			xtal-freq = <ESP32_CLK_XTAL_40M>;
88			#clock-cells = <1>;
89			status = "okay";
90
91			rtc_timer: rtc_timer {
92				compatible = "espressif,esp32-rtc-timer";
93				slow-clk-freq = <ESP32_RTC_SLOW_CLK_FREQ_150K>;
94				interrupts = <RTC_CORE_INTR_SOURCE>;
95				interrupt-parent = <&intc>;
96				status = "okay";
97			};
98		};
99
100		flash: flash-controller@60002000 {
101			compatible = "espressif,esp32-flash-controller";
102			reg = <0x60002000 0x1000>;
103			/* interrupts = <3 0>; */
104
105			#address-cells = <1>;
106			#size-cells = <1>;
107
108			flash0: flash@0 {
109				compatible = "soc-nv-flash";
110				reg = <0 0x800000>;
111				erase-block-size = <4096>;
112				write-block-size = <4>;
113				/* Flash size is specified in SOC/SIP dtsi */
114			};
115		};
116
117		psram0: psram@3c000000 {
118			device_type = "memory";
119			compatible = "mmio-sram";
120			/* PSRAM size is specified in SOC/SIP dtsi */
121			reg = <0x3c000000 DT_SIZE_M(2)>;
122			status = "disabled";
123		};
124
125		ipm0: ipm@3fcc1400 {
126			compatible = "espressif,esp32-ipm";
127			reg = <0x3fcc1400 0x8>;
128			status = "disabled";
129			shared-memory = <&ipmmem0>;
130			shared-memory-size = <0x400>;
131			interrupts = <FROM_CPU_INTR0_SOURCE FROM_CPU_INTR1_SOURCE>;
132			interrupt-parent = <&intc>;
133		};
134
135		uart0: uart@60000000 {
136			compatible = "espressif,esp32-uart";
137			reg = <0x60000000 0x1000>;
138			interrupts = <UART0_INTR_SOURCE>;
139			interrupt-parent = <&intc>;
140			clocks = <&rtc ESP32_UART0_MODULE>;
141			status = "disabled";
142		};
143
144		uart1: uart@60010000 {
145			compatible = "espressif,esp32-uart";
146			reg = <0x60010000 0x1000>;
147			interrupts = <UART1_INTR_SOURCE>;
148			interrupt-parent = <&intc>;
149			clocks = <&rtc ESP32_UART1_MODULE>;
150			status = "disabled";
151		};
152
153		uart2: uart@6002e000 {
154			compatible = "espressif,esp32-uart";
155			reg = <0x6002e000 0x1000>;
156			interrupts = <UART2_INTR_SOURCE>;
157			interrupt-parent = <&intc>;
158			clocks = <&rtc ESP32_UART2_MODULE>;
159			status = "disabled";
160		};
161
162		gpio: gpio {
163			compatible = "simple-bus";
164			gpio-map-mask = <0xffffffe0 0xffffffc0>;
165			gpio-map-pass-thru = <0x1f 0x3f>;
166			gpio-map = <
167				0x00 0x0 &gpio0 0x0 0x0
168				0x20 0x0 &gpio1 0x0 0x0
169			>;
170			#gpio-cells = <2>;
171			#address-cells = <1>;
172			#size-cells = <1>;
173			ranges;
174
175			gpio0: gpio@60004000 {
176				compatible = "espressif,esp32-gpio";
177				gpio-controller;
178				#gpio-cells = <2>;
179				reg = <0x60004000 0x800>;
180				interrupts = <GPIO_INTR_SOURCE>;
181				interrupt-parent = <&intc>;
182				/* Maximum available pins (per port)
183				 * Actual occupied pins are specified
184				 * on part number dtsi level, using
185				 * the `gpio-reserved-ranges` property.
186				 */
187				ngpios = <32>;  /* 0..31 */
188			};
189
190			gpio1: gpio@60004800 {
191				compatible = "espressif,esp32-gpio";
192				gpio-controller;
193				#gpio-cells = <2>;
194				reg = <0x60004800 0x800>;
195				interrupts = <GPIO_INTR_SOURCE>;
196				interrupt-parent = <&intc>;
197				ngpios = <22>; /* 32..53 */
198			};
199		};
200
201		touch: touch@6000885c {
202			compatible = "espressif,esp32-touch";
203			reg = <0x6000885c 0x88 0x60008908 0x18>;
204			interrupts = <RTC_CORE_INTR_SOURCE>;
205			interrupt-parent = <&intc>;
206			status = "disabled";
207		};
208
209		i2c0: i2c@60013000 {
210			compatible = "espressif,esp32-i2c";
211			#address-cells = <1>;
212			#size-cells = <0>;
213			reg = <0x60013000 DT_SIZE_K(4)>;
214			interrupts = <I2C_EXT0_INTR_SOURCE>;
215			interrupt-parent = <&intc>;
216			clocks = <&rtc ESP32_I2C0_MODULE>;
217			status = "disabled";
218		};
219
220		i2c1: i2c@60027000 {
221			compatible = "espressif,esp32-i2c";
222			#address-cells = <1>;
223			#size-cells = <0>;
224			reg = <0x60027000 DT_SIZE_K(4)>;
225			interrupts = <I2C_EXT1_INTR_SOURCE>;
226			interrupt-parent = <&intc>;
227			clocks = <&rtc ESP32_I2C1_MODULE>;
228			status = "disabled";
229		};
230
231		spi2: spi@60024000 {
232			compatible = "espressif,esp32-spi";
233			reg = <0x60024000 DT_SIZE_K(4)>;
234			interrupts = <SPI2_INTR_SOURCE>;
235			interrupt-parent = <&intc>;
236			clocks = <&rtc ESP32_SPI2_MODULE>;
237			dma-clk = <ESP32_GDMA_MODULE>;
238			dma-host = <0>;
239			status = "disabled";
240		};
241
242		spi3: spi@60025000 {
243			compatible = "espressif,esp32-spi";
244			reg = <0x60025000 DT_SIZE_K(4)>;
245			interrupts = <SPI3_INTR_SOURCE>;
246			interrupt-parent = <&intc>;
247			clocks = <&rtc ESP32_SPI3_MODULE>;
248			dma-clk = <ESP32_GDMA_MODULE>;
249			dma-host = <1>;
250			status = "disabled";
251		};
252
253		coretemp: coretemp@60008800 {
254			compatible = "espressif,esp32-temp";
255			friendly-name = "coretemp";
256			reg = <0x60008800 0x4>;
257			status = "disabled";
258		};
259
260		adc0: adc@60040000 {
261			compatible = "espressif,esp32-adc";
262			reg = <0x60040000 4>;
263			unit = <1>;
264			channel-count = <10>;
265			#io-channel-cells = <1>;
266			status = "disabled";
267		};
268
269		adc1: adc@60040004 {
270			compatible = "espressif,esp32-adc";
271			reg = <0x60040004 4>;
272			unit = <2>;
273			channel-count = <10>;
274			#io-channel-cells = <1>;
275			status = "disabled";
276		};
277
278		twai: can@6002b000 {
279			compatible = "espressif,esp32-twai";
280			reg = <0x6002b000 DT_SIZE_K(4)>;
281			interrupts = <TWAI_INTR_SOURCE>;
282			interrupt-parent = <&intc>;
283			clocks = <&rtc ESP32_TWAI_MODULE>;
284			sample-point = <875>;
285			status = "disabled";
286		};
287
288		usb_serial: uart@60038000 {
289			compatible = "espressif,esp32-usb-serial";
290			reg = <0x60038000 DT_SIZE_K(4)>;
291			status = "disabled";
292			interrupts = <USB_SERIAL_JTAG_INTR_SOURCE>;
293			interrupt-parent = <&intc>;
294			clocks = <&rtc ESP32_USB_MODULE>;
295		};
296
297		timer0: counter@6001f000 {
298			compatible = "espressif,esp32-timer";
299			reg = <0x6001f000 DT_SIZE_K(4)>;
300			group = <0>;
301			index = <0>;
302			interrupts = <TG0_T0_LEVEL_INTR_SOURCE>;
303			interrupt-parent = <&intc>;
304			status = "disabled";
305		};
306
307		timer1: counter@6001f024 {
308			compatible = "espressif,esp32-timer";
309			reg = <0x6001f024 DT_SIZE_K(4)>;
310			group = <0>;
311			index = <1>;
312			interrupts = <TG0_T1_LEVEL_INTR_SOURCE>;
313			interrupt-parent = <&intc>;
314			status = "disabled";
315		};
316
317		timer2: counter@60020000 {
318			compatible = "espressif,esp32-timer";
319			reg = <0x60020000 DT_SIZE_K(4)>;
320			group = <1>;
321			index = <0>;
322			interrupts = <TG1_T0_LEVEL_INTR_SOURCE>;
323			interrupt-parent = <&intc>;
324			status = "disabled";
325		};
326
327		timer3: counter@60020024 {
328			compatible = "espressif,esp32-timer";
329			reg = <0x60020024 DT_SIZE_K(4)>;
330			group = <1>;
331			index = <1>;
332			interrupts = <TG1_T1_LEVEL_INTR_SOURCE>;
333			interrupt-parent = <&intc>;
334		};
335
336		wdt0: watchdog@6001f048 {
337			compatible = "espressif,esp32-watchdog";
338			reg = <0x6001f048 0x20>;
339			interrupts = <TG0_WDT_LEVEL_INTR_SOURCE>;
340			interrupt-parent = <&intc>;
341			clocks = <&rtc ESP32_TIMG0_MODULE>;
342			status = "disabled";
343		};
344
345		wdt1: watchdog@60020048 {
346			compatible = "espressif,esp32-watchdog";
347			reg = <0x60020048 0x20>;
348			interrupts = <TG1_WDT_LEVEL_INTR_SOURCE>;
349			interrupt-parent = <&intc>;
350			clocks = <&rtc ESP32_TIMG1_MODULE>;
351			status = "disabled";
352		};
353
354		trng0: trng@6003507c {
355			compatible = "espressif,esp32-trng";
356			reg = <0x6003507c 0x4>;
357			status = "disabled";
358		};
359
360		ledc0: ledc@60019000 {
361			compatible = "espressif,esp32-ledc";
362			#pwm-cells = <3>;
363			reg = <0x60019000 DT_SIZE_K(4)>;
364			clocks = <&rtc ESP32_LEDC_MODULE>;
365			status = "disabled";
366		};
367
368		mcpwm0: mcpwm@6001e000 {
369			compatible = "espressif,esp32-mcpwm";
370			reg = <0x6001e000 DT_SIZE_K(4)>;
371			interrupts = <PWM0_INTR_SOURCE>;
372			interrupt-parent = <&intc>;
373			clocks = <&rtc ESP32_PWM0_MODULE>;
374			#pwm-cells = <3>;
375			status = "disabled";
376		};
377
378		mcpwm1: mcpwm@6002c000 {
379			compatible = "espressif,esp32-mcpwm";
380			reg = <0x6002c000 DT_SIZE_K(4)>;
381			interrupts = <PWM1_INTR_SOURCE>;
382			interrupt-parent = <&intc>;
383			clocks = <&rtc ESP32_PWM1_MODULE>;
384			#pwm-cells = <3>;
385			status = "disabled";
386		};
387
388		pcnt: pcnt@60017000 {
389			compatible = "espressif,esp32-pcnt";
390			reg = <0x60017000 DT_SIZE_K(4)>;
391			interrupts = <PCNT_INTR_SOURCE>;
392			interrupt-parent = <&intc>;
393			clocks = <&rtc ESP32_PCNT_MODULE>;
394			status = "disabled";
395		};
396
397		dma: dma@6003f000 {
398			compatible = "espressif,esp32-gdma";
399			reg = <0x6003f000 DT_SIZE_K(4)>;
400			#dma-cells = <1>;
401			interrupts = <DMA_IN_CH0_INTR_SOURCE DMA_OUT_CH0_INTR_SOURCE
402						DMA_IN_CH1_INTR_SOURCE DMA_OUT_CH1_INTR_SOURCE
403						DMA_IN_CH2_INTR_SOURCE DMA_OUT_CH2_INTR_SOURCE>;
404			interrupt-parent = <&intc>;
405			clocks = <&rtc ESP32_GDMA_MODULE>;
406			dma-channels = <10>;
407			dma-buf-addr-alignment = <4>;
408			status = "disabled";
409		};
410
411	};
412};
413