1# Copyright (c) 2018 Nordic Semiconductor ASA 2# SPDX-License-Identifier: Apache-2.0 3 4# Common fields for Nordic nRF family SPI peripherals 5 6include: [spi-controller.yaml, pinctrl-device.yaml] 7 8properties: 9 reg: 10 required: true 11 12 interrupts: 13 required: true 14 15 pinctrl-0: 16 required: true 17 18 max-frequency: 19 type: int 20 required: true 21 description: | 22 Maximum data rate the SPI peripheral can be driven at, in Hz. This 23 property must be set at SoC level DTS files. 24 25 overrun-character: 26 type: int 27 default: 0xff 28 description: | 29 The overrun character (ORC) is used when all bytes from the TX buffer 30 are sent, but the transfer continues due to RX. Defaults to 0xff 31 (line high), the most common value used in SPI transfers. 32 33 easydma-maxcnt-bits: 34 type: int 35 required: true 36 description: | 37 Maximum number of bits available in the EasyDMA MAXCNT register. This 38 property must be set at SoC level DTS files. 39 40 wake-gpios: 41 type: phandle-array 42 description: | 43 Optional bi-directional line that allows SPI master to indicate to SPI 44 slave (by setting the line high) that a transfer is to occur, so that 45 the latter can prepare (and indicate its readiness) for handling that 46 transfer when it is actually needed, and stay in any desired low-power 47 state otherwise. 48 The protocol is as follows: 49 - initially, SPI slave configures its WAKE line pin as an input and SPI 50 master keeps the line in the low state 51 - when a transfer is to be performed, SPI master configures its WAKE 52 line pin as an input with pull-up; this changes the line state to 53 high but allows SPI slave to override that state 54 - when SPI slave detects the high state of the WAKE line, it prepares 55 for the transfer and when everything is ready, it drives the WAKE 56 line low by configuring its pin as an output 57 - the generated high-to-low transition on the WAKE line is a signal 58 to SPI master that it can proceed with the transfer 59 - SPI slave releases the line by configuring its pin back to be an input 60 and SPI master again keeps the line in the low state 61 Please note that the line must be configured and properly handled on 62 both sides for the mechanism to work correctly. 63