1# Copyright (c) 2024 Antmicro <www.antmicro.com>
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5  Xilinx ZynqMP SoC pinctrl node. It allows configuration of pin assignments
6  for the supported peripherals.
7
8  See Zynq UltraScale+ Devices Register Reference (UG1087) for details regarding
9  valid pin assignments
10compatible: "xlnx,pinctrl-zynqmp"
11
12include: base.yaml
13
14child-binding:
15  description: |
16    Definitions for a pinctrl state.
17  child-binding:
18
19    include:
20      - name: pincfg-node.yaml
21
22    properties:
23      pinmux:
24        required: true
25        type: array
26        description: |
27            Pin assignments for the selected group
28