1# Copyright (c) 2022 Vaishnav Achath 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 TI SimpleLink CC13xx / CC26xx pinctrl node. 6 7 Device pin configuration should be placed in the child nodes of this node. 8 Populate the 'pinmux' field with a pair consisting of a pin number and its IO 9 functions. 10 11 The node has the 'pinctrl' node label set in your SoC's devicetree, 12 so you can modify it like this: 13 14 &pinctrl { 15 /* your modifications go here */ 16 }; 17 18 All device pin configurations should be placed in child nodes of the 19 'pinctrl' node, as in the i2c0 example shown at the end. 20 21 Here is a list of 22 supported standard pin properties: 23 24 - bias-disable: Disable pull-up/down. 25 - bias-pull-down: Enable pull-down resistor. 26 - bias-pull-up: Enable pull-up resistor. 27 - drive-open-drain: Output driver is open-drain. 28 - drive-open-drain: Output driver is open-source. 29 - drive-strength: Minimum current that can be sourced from the pin. 30 - input-enable: enable input. 31 - input-schmitt-enable: enable input schmitt circuit. 32 - ti,input-edge-detect: enable and configure edge detection interrupts 33 34 An example for CC13XX family, include the chip level pinctrl 35 DTSI file in the board level DTS: 36 37 #include <dt-bindings/pinctrl/cc13xx_cc26xx-pinctrl.h> 38 39 We want to configure the I2C pins to open drain, with pullup enabled 40 and input enabled. 41 42 To change a pin's pinctrl default properties add a reference to the 43 pin in the board's DTS file and set the properties. 44 45 &i2c0 { 46 pinctrl-0 = <&i2c0_scl_default &i2c0_sda_default>; 47 pinctrl-1 = <&i2c0_scl_sleep &i2c0_sda_sleep>; 48 pinctrl-names = "default", "sleep"; 49 } 50 51 The i2c0_scl_default corresponds to the following in the board dts file: 52 53 &pinctrl { 54 i2c0_scl_default: i2c0_scl_default { 55 pinmux = <4 IOC_PORT_MCU_I2C_MSSCL>; 56 bias-pull-up; 57 drive-open-drain; 58 input-enable; 59 }; 60 }; 61 62 To configure an input pin with edge detection (e.g. to count pulses): 63 64 &pinctrl { 65 gpt0_edge_counter: gpt0_edge_counter { 66 pinmux = <15 IOC_PORT_MCU_PORT_EVENT0>; 67 input-enable; 68 bias-pull-up; 69 ti,input-edge-detect = <IOC_RISING_EDGE>; 70 }; 71 }; 72 73 To configure an output pin (e.g. for PWM output): 74 75 &pinctrl { 76 gpt0_pwm: gpt0_pwm { 77 pinmux = <16 IOC_PORT_MCU_PORT_EVENT1>; 78 bias-disable; 79 drive-strength = <8>; /* in mA */ 80 }; 81 }; 82 83compatible: "ti,cc13xx-cc26xx-pinctrl" 84 85include: base.yaml 86 87properties: 88 reg: 89 required: true 90 91child-binding: 92 description: | 93 This binding gives a base representation of the CC13XX/CC26XX 94 pins configuration. 95 96 include: 97 - name: pincfg-node.yaml 98 property-allowlist: 99 - bias-disable 100 - bias-pull-down 101 - bias-pull-up 102 - drive-open-drain 103 - drive-open-source 104 - drive-strength 105 - input-enable 106 - input-schmitt-enable 107 108 properties: 109 pinmux: 110 required: true 111 type: array 112 description: | 113 CC13XX/CC26XX pin's configuration (IO pin, IO function). 114 115 drive-strength: 116 enum: 117 - 2 118 - 4 119 - 8 120 default: 2 121 description: | 122 The drive strength controls the minimum output driver strength of an I/O pin 123 configured as an output. 124 2: min 2 mA (SoC default) 125 4: min 4 mA 126 8: min 8 mA for for double drive strength IOs, min 4 mA for normal IOs 127 128 ti,input-edge-detect: 129 type: int 130 default: 0 # no edge detection 131 description: | 132 Enables or disables the edge detection interrupt and configures it: 133 IOC_NO_EDGE: No edge detection (SoC default) 134 IOC_FALLING_EDGE: Edge detection on falling edge 135 IOC_RISING_EDGE: Edge detection on rising edge 136 IOC_BOTH_EDGES: Edge detection on both edges 137