1# Copyright (c) 2020 Linaro Limited
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    STM32F1 Pin controller Node
6    Based on pincfg-node.yaml binding.
7
8    Note: `bias-disable` and `drive-push-pull` are default pin configurations.
9           They will be applied in case no `bias-foo` or `driver-bar` properties
10           are set.
11
12compatible: "st,stm32f1-pinctrl"
13
14include: base.yaml
15
16properties:
17  reg:
18    required: true
19
20  swj-cfg:
21    type: string
22    default: "full" # reset state
23    enum:
24      - "full"
25      - "no-njtrst"
26      - "jtag-disable"
27      - "disable"
28    description: |
29      Configures number of pins assigned to the SWJ debug port.
30
31      * full         - Full SWJ (JTAG-DP + SW-DP).
32      * no-njtrst    - Full SWJ (JTAG-DP + SW-DP) but without NJTRST.
33                       Releases: PB4.
34      * jtag-disable - JTAG-DP Disabled and SW-DP Enabled.
35                       Releases: PA15 PB3 PB4.
36      * disable      - JTAG-DP Disabled and SW-DP Disabled.
37                       Releases: PA13 PA14 PA15 PB3 PB4.
38
39      If absent, then Full SWJ (JTAG-DP + SW-DP) is used (reset state).
40
41child-binding:
42  description: |
43      This binding gives a base representation of the STM32F1 pins
44      configuration
45
46  include:
47    - name: pincfg-node.yaml
48      property-allowlist:
49        - bias-disable
50        - bias-pull-down
51        - bias-pull-up
52        - drive-push-pull
53        - drive-open-drain
54        - output-low
55        - output-high
56
57  properties:
58    pinmux:
59      required: true
60      type: int
61      description: |
62        Adapted from
63        https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
64        Integer array, represents gpio pin number and mux setting.
65        These defines are calculated as: ((port * 16 + line) << 8) | (function << 6) | remap)
66        With:
67        - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
68        - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
69        - function: The configuration mode, can be:
70        * 0 : Alternate function output
71        * 1 : Input
72        * 2 : Analog
73        * 3 : GPIO output
74        In case selected pin function is GPIO output, pin is statically configured as
75        a plain output GPIO, which configuration can be set by adding 'ouptut-low' or
76        'output-high' properties to the pinctrl configuration. Default is output-low.
77        - remap: The pin remapping configuration. It allows to assign the pin
78        function to a different peripheral. Remain configuration can be:
79        * 0 : No remap
80        * 1 : Partial remap 1
81        * 2 : Partial remap 2
82        * 3 : Partial remap 3
83        * 4 : Full remap
84        To simplify the usage, macro is available to generate "pinmux" field.
85        This macro is available here:
86          -include/zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h
87        Some examples of macro usage:
88           GPIO A9 set as alternate with no remap
89        ... {
90                 pinmux = <STM32F1_PINMUX('A', 9, ALTERNATE, REMAP_NO)>;
91        };
92           GPIO A9 set as alternate with full remap
93        ... {
94                 pinmux = <STM32F1_PINMUX('A', 9, ALTERNATE, REMAP_FULL)>;
95        };
96           GPIO A9 set as input
97        ... {
98                 pinmux = <STM32F1_PINMUX('A', 9, GPIO_IN, REMAP_NO)>;
99        };
100           GPIO A9 set as output-high
101        ... {
102                 pinmux = <STM32F1_PINMUX('A', 9, GPIO_OUT, REMAP_NO)>;
103                 output-high;
104        };
105
106    slew-rate:
107      type: string
108      default: "max-speed-10mhz"
109      enum:
110        - "max-speed-10mhz"       # Default
111        - "max-speed-2mhz"
112        - "max-speed-50mhz"
113      description: |
114        Pin output mode, maximum achievable speed. Only applies to
115        output mode (alternate).
116