1/* 2 * Copyright (c) 2020 Piotr Mienkowski 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv7-m.dtsi> 8#include <zephyr/dt-bindings/gpio/gpio.h> 9#include <zephyr/dt-bindings/i2c/i2c.h> 10#include "gpio_gecko.h" 11 12/ { 13 chosen { 14 zephyr,flash-controller = &msc; 15 }; 16 17 cpus { 18 #address-cells = <1>; 19 #size-cells = <0>; 20 21 cpu0: cpu@0 { 22 compatible = "arm,cortex-m4f"; 23 reg = <0>; 24 }; 25 }; 26 27 sram0: memory@20000000 { 28 compatible = "mmio-sram"; 29 }; 30 31 soc { 32 msc: flash-controller@400e0000 { 33 compatible = "silabs,gecko-flash-controller"; 34 reg = <0x400e0000 0x104>; 35 interrupts = <25 0>; 36 37 #address-cells = <1>; 38 #size-cells = <1>; 39 40 flash0: flash@0 { 41 compatible = "soc-nv-flash"; 42 write-block-size = <4>; 43 erase-block-size = <2048>; 44 }; 45 }; 46 47 usart0: usart@40010000 { /* USART0 */ 48 compatible = "silabs,gecko-usart"; 49 reg = <0x40010000 0x400>; 50 interrupts = <12 0>, <13 0>; 51 interrupt-names = "rx", "tx"; 52 peripheral-id = <0>; 53 status = "disabled"; 54 }; 55 56 usart1: usart@40010400 { /* USART1 */ 57 compatible = "silabs,gecko-usart"; 58 reg = <0x40010400 0x400>; 59 interrupts = <20 0>, <21 0>; 60 interrupt-names = "rx", "tx"; 61 peripheral-id = <1>; 62 status = "disabled"; 63 }; 64 65 usart2: usart@40010800 { /* USART2 */ 66 compatible = "silabs,gecko-usart"; 67 reg = <0x40010800 0x400>; 68 interrupts = <38 0>, <39 0>; 69 interrupt-names = "rx", "tx"; 70 peripheral-id = <2>; 71 status = "disabled"; 72 }; 73 74 leuart0: leuart@4004a000 { /* LEUART0 */ 75 compatible = "silabs,gecko-leuart"; 76 reg = <0x4004a000 0x400>; 77 interrupts = <22 0>; 78 peripheral-id = <0>; 79 status = "disabled"; 80 }; 81 82 i2c0: i2c@4000c000 { 83 compatible = "silabs,gecko-i2c"; 84 clock-frequency = <I2C_BITRATE_STANDARD>; 85 #address-cells = <1>; 86 #size-cells = <0>; 87 reg = <0x4000c000 0x400>; 88 interrupts = <17 0>; 89 status = "disabled"; 90 }; 91 92 i2c1: i2c@4000c400 { 93 compatible = "silabs,gecko-i2c"; 94 clock-frequency = <I2C_BITRATE_STANDARD>; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 reg = <0x4000c400 0x400>; 98 interrupts = <40 0>; 99 status = "disabled"; 100 }; 101 102 rtcc0: rtcc@40042000 { 103 compatible = "silabs,gecko-rtcc"; 104 reg = <0x40042000 0x184>; 105 interrupts = <31 0>; 106 clock-frequency = <32768>; 107 prescaler = <1>; 108 status = "disabled"; 109 }; 110 111 gpio: gpio@4000a400 { 112 compatible = "silabs,gecko-gpio"; 113 reg = <0x4000a400 0xc00>; 114 interrupts = <10 2 18 2>; 115 interrupt-names = "GPIO_EVEN", "GPIO_ODD"; 116 117 ranges; 118 #address-cells = <1>; 119 #size-cells = <1>; 120 121 gpioa: gpio@4000a000 { 122 compatible = "silabs,gecko-gpio-port"; 123 reg = <0x4000a000 0x30>; 124 peripheral-id = <0>; 125 gpio-controller; 126 #gpio-cells = <2>; 127 status = "disabled"; 128 }; 129 130 gpiob: gpio@4000a030 { 131 compatible = "silabs,gecko-gpio-port"; 132 reg = <0x4000a030 0x30>; 133 peripheral-id = <1>; 134 gpio-controller; 135 #gpio-cells = <2>; 136 status = "disabled"; 137 }; 138 139 gpioc: gpio@4000a060 { 140 compatible = "silabs,gecko-gpio-port"; 141 reg = <0x4000a060 0x30>; 142 peripheral-id = <2>; 143 gpio-controller; 144 #gpio-cells = <2>; 145 status = "disabled"; 146 }; 147 148 gpiod: gpio@4000a090 { 149 compatible = "silabs,gecko-gpio-port"; 150 reg = <0x4000a090 0x30>; 151 peripheral-id = <3>; 152 gpio-controller; 153 #gpio-cells = <2>; 154 status = "disabled"; 155 }; 156 157 gpiof: gpio@4000a0f0 { 158 compatible = "silabs,gecko-gpio-port"; 159 reg = <0x4000a0f0 0x30>; 160 peripheral-id = <5>; 161 gpio-controller; 162 #gpio-cells = <2>; 163 status = "disabled"; 164 }; 165 }; 166 167 wdog0: wdog@40052000 { 168 compatible = "silabs,gecko-wdog"; 169 reg = <0x40052000 0x2C>; 170 peripheral-id = <0>; 171 interrupts = <2 0>; 172 status = "disabled"; 173 }; 174 175 wdog1: wdog@40052400 { 176 compatible = "silabs,gecko-wdog"; 177 reg = <0x40052400 0x2C>; 178 peripheral-id = <1>; 179 interrupts = <3 0>; 180 status = "disabled"; 181 }; 182 }; 183 184 pinctrl: pin-controller { 185 /* Pin controller is a "virtual" device since SiLabs SoCs do pin 186 * control in a distributed way (GPIO registers and PSEL 187 * registers on each peripheral). 188 */ 189 compatible = "silabs,gecko-pinctrl"; 190 }; 191}; 192 193&nvic { 194 arm,num-irq-priority-bits = <3>; 195}; 196