1/* 2 * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv8-m.dtsi> 8#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h> 9#include <zephyr/dt-bindings/gpio/gpio.h> 10#include <zephyr/dt-bindings/i2c/i2c.h> 11#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 12#include <mem.h> 13 14/ { 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 compatible = "arm,cortex-m33f"; 21 reg = <0>; 22 #address-cells = <1>; 23 #size-cells = <1>; 24 25 mpu: mpu@e000ed90 { 26 compatible = "arm,armv8m-mpu"; 27 reg = <0xe000ed90 0x40>; 28 }; 29 }; 30 }; 31}; 32 33&sram { 34 #address-cells = <1>; 35 #size-cells = <1>; 36 37 sramx: memory@4000000 { 38 compatible = "mmio-sram"; 39 reg = <0x4000000 DT_SIZE_K(16)>; 40 }; 41 42 sram0: memory@20000000 { 43 compatible = "mmio-sram"; 44 reg = <0x20000000 DT_SIZE_K(32)>; 45 }; 46 47 sram1: memory@20008000 { 48 compatible = "zephyr,memory-region", "mmio-sram"; 49 reg = <0x20008000 DT_SIZE_K(16)>; 50 zephyr,memory-region = "SRAM1"; 51 }; 52 53 sram2: memory@2000c000 { 54 compatible = "zephyr,memory-region", "mmio-sram"; 55 reg = <0x2000c000 DT_SIZE_K(16)>; 56 zephyr,memory-region = "SRAM2"; 57 }; 58 59 usb_sram: memory@20010000 { 60 /* Connected to USB bus*/ 61 compatible = "zephyr,memory-region", "mmio-sram"; 62 reg = <0x20010000 DT_SIZE_K(16)>; 63 zephyr,memory-region = "USB_SRAM"; 64 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; 65 }; 66}; 67 68&peripheral { 69 #address-cells = <1>; 70 #size-cells = <1>; 71 72 syscon: syscon@0 { 73 compatible = "nxp,lpc-syscon"; 74 reg = <0x0 0x4000>; 75 #clock-cells = <1>; 76 }; 77 78 iap: flash-controller@34000 { 79 compatible = "nxp,iap-fmc55"; 80 reg = <0x34000 0x18>; 81 #address-cells = <1>; 82 #size-cells = <1>; 83 status = "disabled"; 84 85 flash0: flash@0 { 86 compatible = "soc-nv-flash"; 87 reg = <0x0 DT_SIZE_K(246)>; 88 erase-block-size = <512>; 89 write-block-size = <512>; 90 }; 91 92 flash_reserved: flash@3d800 { 93 compatible = "soc-nv-flash"; 94 reg = <0x0003d800 DT_SIZE_K(10)>; 95 status = "disabled"; 96 }; 97 98 uuid: flash@9fc70 { 99 compatible = "nxp,lpc-uid"; 100 reg = <0x3fc70 0x10>; 101 }; 102 103 boot_rom: flash@3000000 { 104 compatible = "soc-nv-flash"; 105 reg = <0x3000000 DT_SIZE_K(128)>; 106 }; 107 }; 108 109 iocon: iocon@1000 { 110 compatible = "nxp,lpc-iocon"; 111 reg = <0x1000 0x100>; 112 #address-cells = <1>; 113 #size-cells = <1>; 114 ranges = <0x0 0x1000 0x100>; 115 pinctrl: pinctrl { 116 compatible = "nxp,lpc-iocon-pinctrl"; 117 }; 118 }; 119 120 gpio0: gpio@0 { 121 compatible = "nxp,lpc-gpio"; 122 reg = <0x8c000 0x2488>; 123 int-source = "pint"; 124 gpio-controller; 125 #gpio-cells = <2>; 126 port = <0>; 127 }; 128 129 gpio1: gpio@1 { 130 compatible = "nxp,lpc-gpio"; 131 reg = <0x8c000 0x2488>; 132 int-source = "pint"; 133 gpio-controller; 134 #gpio-cells = <2>; 135 port = <1>; 136 }; 137 138 pint: pint@4000 { 139 compatible = "nxp,pint"; 140 reg = <0x4000 0x1000>; 141 interrupt-controller; 142 #interrupt-cells = <1>; 143 #address-cells = <0>; 144 interrupts = <4 2>, <5 2>, <6 2>, <7 2>, 145 <32 2>, <33 2>, <34 2>, <35 2>; 146 num-lines = <8>; 147 num-inputs = <64>; 148 }; 149 150 flexcomm0: flexcomm@86000 { 151 compatible = "nxp,lpc-flexcomm"; 152 reg = <0x86000 0x1000>; 153 interrupts = <14 0>; 154 clocks = <&syscon MCUX_FLEXCOMM0_CLK>; 155 status = "disabled"; 156 }; 157 158 flexcomm1: flexcomm@87000 { 159 compatible = "nxp,lpc-flexcomm"; 160 reg = <0x87000 0x1000>; 161 interrupts = <15 0>; 162 clocks = <&syscon MCUX_FLEXCOMM1_CLK>; 163 status = "disabled"; 164 }; 165 166 flexcomm2: flexcomm@88000 { 167 compatible = "nxp,lpc-flexcomm"; 168 reg = <0x88000 0x1000>; 169 interrupts = <16 0>; 170 clocks = <&syscon MCUX_FLEXCOMM2_CLK>; 171 status = "disabled"; 172 }; 173 174 flexcomm3: flexcomm@89000 { 175 compatible = "nxp,lpc-flexcomm"; 176 reg = <0x89000 0x1000>; 177 interrupts = <17 0>; 178 clocks = <&syscon MCUX_FLEXCOMM3_CLK>; 179 status = "disabled"; 180 }; 181 182 flexcomm4: flexcomm@8a000 { 183 compatible = "nxp,lpc-flexcomm"; 184 reg = <0x8a000 0x1000>; 185 interrupts = <18 0>; 186 clocks = <&syscon MCUX_FLEXCOMM4_CLK>; 187 status = "disabled"; 188 }; 189 190 flexcomm5: flexcomm@96000 { 191 compatible = "nxp,lpc-flexcomm"; 192 reg = <0x96000 0x1000>; 193 interrupts = <19 0>; 194 clocks = <&syscon MCUX_FLEXCOMM5_CLK>; 195 status = "disabled"; 196 }; 197 198 flexcomm6: flexcomm@97000 { 199 compatible = "nxp,lpc-flexcomm"; 200 reg = <0x97000 0x1000>; 201 interrupts = <20 0>; 202 clocks = <&syscon MCUX_FLEXCOMM6_CLK>; 203 status = "disabled"; 204 }; 205 206 flexcomm7: flexcomm@98000 { 207 compatible = "nxp,lpc-flexcomm"; 208 reg = <0x98000 0x1000>; 209 interrupts = <21 0>; 210 clocks = <&syscon MCUX_FLEXCOMM7_CLK>; 211 status = "disabled"; 212 }; 213 214 can0: can@9d000 { 215 compatible = "nxp,lpc-mcan"; 216 reg = <0x9d000 0x1000>; 217 interrupts = <43 0>, <44 0>; 218 interrupt-names = "int0", "int1"; 219 clocks = <&syscon MCUX_MCAN_CLK>; 220 bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>; 221 sample-point = <875>; 222 sample-point-data = <875>; 223 status = "disabled"; 224 }; 225 226 hs_lspi: spi@9f000 { 227 compatible = "nxp,lpc-spi"; 228 reg = <0x9f000 0x1000>; 229 interrupts = <59 0>; 230 clocks = <&syscon MCUX_HS_SPI_CLK>; 231 status = "disabled"; 232 #address-cells = <1>; 233 #size-cells = <0>; 234 }; 235 236 rng: rng@3a000 { 237 compatible = "nxp,lpc-rng"; 238 reg = <0x3a000 0x1000>; 239 status = "okay"; 240 }; 241 242 usbhs: usbhs@144000 { 243 compatible = "nxp,lpcip3511"; 244 reg = <0x94000 0x1000>; 245 interrupts = <47 1>; 246 num-bidir-endpoints = <6>; 247 status = "disabled"; 248 }; 249}; 250 251&nvic { 252 arm,num-irq-priority-bits = <3>; 253}; 254
