1/*
2 * Copyright (c) 2023 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/* Common pin-mux configurations in npcx family */
8#include <nuvoton/npcx/npcx-alts-map.dtsi>
9
10/* Specific pin-mux configurations in npcx4 series */
11/ {
12	npcx-alts-map {
13		compatible = "nuvoton,npcx-pinctrl-conf";
14
15		/* SCFG DEVALT 0 */
16		alt0_f_spi_cs1: alt04 {
17			alts = <&scfg 0x00 0x4 0>;
18		};
19		alt0_f_spi_quad: alt06 {
20			alts = <&scfg 0x00 0x6 0>;
21		};
22
23		/* SCFG DEVALT 2 */
24		alt2_i2c4_0_sl: alt27 {
25			alts = <&scfg 0x02 0x7 0>;
26		};
27
28		/* SCFG DEVALT 5 */
29		alt5_jen_lk: alt51 {
30			alts = <&scfg 0x05 0x1 0>;
31		};
32		alt5_gp_lk: alt57 {
33			alts = <&scfg 0x05 0x7 0>;
34		};
35
36		/* SCFG DEVALT E */
37		alte_cr_sin4_sl: alte6 {
38			alts = <&scfg 0x0E 0x6 0>;
39		};
40		alte_cr_sout4_sl: alte7 {
41			alts = <&scfg 0x0E 0x7 0>;
42		};
43
44		/* SCFG DEVALT F */
45		altf_adc10_sl: altf5 {
46			alts = <&scfg 0x0F 0x5 0>;
47		};
48		altf_adc11_sl: altf6 {
49			alts = <&scfg 0x0F 0x6 0>;
50		};
51
52		/* SCFG DEVALT A */
53		alta_32kclkin_sl: alta3 {
54			alts = <&scfg 0x0A 0x3 0>;
55		};
56
57		/* SCFG DEVALT C */
58		altc_gpio97_sl_inv: altc2-inv {
59			alts = <&scfg 0x0C 0x2 1>;
60		};
61
62		/* SCFG DEVALT F */
63		altf_adc12_sl: altf7 {
64			alts = <&scfg 0x0F 0x7 0>;
65		};
66
67		/* SCFG DEVALT G */
68		altg_vcc1_rst_pud: altg4 {
69			alts = <&scfg 0x10 0x4 0>;
70		};
71		altg_vcc1_rst_pud_lk: altg5 {
72			alts = <&scfg 0x10 0x5 0>;
73		};
74		altg_psl_out_sl: altg6 {
75			alts = <&scfg 0x10 0x6 0>;
76		};
77		altg_psl_gpo_sl: altg7 {
78			alts = <&scfg 0x10 0x7 0>;
79		};
80
81		/* SCFG DEVALT H */
82		alth_fcsi_typ: alth1 {
83			alts = <&scfg 0x11 0x1 0>;
84		};
85		alth_flm_quad: alth5 {
86			alts = <&scfg 0x11 0x5 0>;
87		};
88		alth_flm_mon_md: alth6-inv {
89			alts = <&scfg 0x11 0x6 1>;
90		};
91		alth_flm_sl: alth7 {
92			alts = <&scfg 0x11 0x7 0>;
93		};
94
95		/*
96		 * Note: DEVALT I is skipped in the datasheet, the offset of
97		 * DEVALT J is 0x12 not 0x13.
98		 */
99		/* SCFG DEVALT J */
100		altj_cr_sin1_sl1: altj0 {
101			alts = <&scfg 0x12 0x0 0>;
102		};
103		altj_cr_sout1_sl1: altj1 {
104			alts = <&scfg 0x12 0x1 0>;
105		};
106		altj_cr_sin1_sl2:  altj2 {
107			alts = <&scfg 0x12 0x2 0>;
108		};
109		altj_cr_sout1_sl2: altj3 {
110			alts = <&scfg 0x12 0x3 0>;
111		};
112		altj_cr_sin2_sl: altj4 {
113			alts = <&scfg 0x12 0x4 0>;
114		};
115		altj_cr_sout2_sl: altj5 {
116			alts = <&scfg 0x12 0x5 0>;
117		};
118		altj_cr_sin3_sl: altj6 {
119			alts = <&scfg 0x12 0x6 0>;
120		};
121		altj_cr_sout3_sl: altj7 {
122			alts = <&scfg 0x12 0x7 0>;
123		};
124
125		/* SCFG DEVALT K */
126		altk_i2c7_1_sl: altk7 {
127			alts = <&scfg 0x13 0x7 0>;
128		};
129
130		/* SCFG DEVALT L */
131		altl_adc13_sl: altl0 {
132			alts = <&scfg 0x14 0x0 0>;
133		};
134		altl_adc14_sl: altl1 {
135			alts = <&scfg 0x14 0x1 0>;
136		};
137		altl_adc15_sl:  altl2 {
138			alts = <&scfg 0x14 0x2 0>;
139		};
140		altl_adc16_sl: altl3 {
141			alts = <&scfg 0x14 0x3 0>;
142		};
143		altl_adc17_sl: altl4 {
144			alts = <&scfg 0x14 0x4 0>;
145		};
146		altl_adc18_sl: altl5 {
147			alts = <&scfg 0x14 0x5 0>;
148		};
149		altl_adc19_sl: altl6 {
150			alts = <&scfg 0x14 0x6 0>;
151		};
152		altl_adc20_sl: altl7 {
153			alts = <&scfg 0x14 0x7 0>;
154		};
155
156		/* SCFG DEVALT M */
157		altm_adc21_sl: altm0 {
158			alts = <&scfg 0x15 0x0 0>;
159		};
160		altm_adc22_sl: altm1 {
161			alts = <&scfg 0x15 0x1 0>;
162		};
163		altm_adc23_sl:  altm2 {
164			alts = <&scfg 0x15 0x2 0>;
165		};
166		altm_adc24_sl: altm3 {
167			alts = <&scfg 0x15 0x3 0>;
168		};
169		altm_adc25_sl: altm4 {
170			alts = <&scfg 0x15 0x4 0>;
171		};
172
173		/* SCFG DEVALT N */
174		altn_i3c1_sl: altn0 {
175			alts = <&scfg 0x16 0x0 0>;
176		};
177		altn_i3c2_sl: altn1 {
178			alts = <&scfg 0x16 0x1 0>;
179		};
180		altn_i3c3_sl:  altn2 {
181			alts = <&scfg 0x16 0x2 0>;
182		};
183	};
184};
185