1/*
2 * Copyright (c) 2018 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8#include <nordic/nrf_common.dtsi>
9
10/ {
11	cpus {
12		#address-cells = <1>;
13		#size-cells = <0>;
14
15		cpu@0 {
16			device_type = "cpu";
17			compatible = "arm,cortex-m33f";
18			reg = <0>;
19			#address-cells = <1>;
20			#size-cells = <1>;
21
22			mpu: mpu@e000ed90 {
23				compatible = "arm,armv8m-mpu";
24				reg = <0xe000ed90 0x40>;
25			};
26		};
27	};
28
29	chosen {
30		zephyr,entropy = &psa_rng;
31		zephyr,flash-controller = &flash_controller;
32	};
33
34	soc {
35		sram0: memory@20000000 {
36			compatible = "mmio-sram";
37		};
38
39		peripheral@40000000 {
40			#address-cells = <1>;
41			#size-cells = <1>;
42			ranges = <0x0 0x40000000 0x10000000>;
43
44			/* Common nRF91 peripherals description. */
45			#include "nrf91_peripherals.dtsi"
46		};
47
48		/*
49		 * GPIOTE1 is always accessible as a non-secure peripheral,
50		 * so we give it the 'gpiote' label for use when building
51		 * code for this target.
52		 */
53		gpiote: gpiote1: gpiote@40031000 {
54			compatible = "nordic,nrf-gpiote";
55			reg = <0x40031000 0x1000>;
56			interrupts = <49 5>;
57			status = "disabled";
58			instance = <1>;
59		};
60	};
61
62	psa_rng: psa-rng {
63		compatible = "zephyr,psa-crypto-rng";
64		status = "okay";
65	};
66};
67
68&nvic {
69	arm,num-irq-priority-bits = <3>;
70};
71
72&systick {
73	/* Use RTC for system clock, instead of SysTick. */
74	status = "disabled";
75};
76