1/* 2 * Copyright (c) 2019 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv7-m.dtsi> 8#include <nordic/nrf_common.dtsi> 9 10/ { 11 chosen { 12 zephyr,entropy = &rng; 13 zephyr,flash-controller = &flash_controller; 14 }; 15 16 cpus { 17 #address-cells = <1>; 18 #size-cells = <0>; 19 20 cpu@0 { 21 device_type = "cpu"; 22 compatible = "arm,cortex-m4"; 23 reg = <0>; 24 #address-cells = <1>; 25 #size-cells = <1>; 26 27 itm: itm@e0000000 { 28 compatible = "arm,armv7m-itm"; 29 reg = <0xe0000000 0x1000>; 30 swo-ref-frequency = <32000000>; 31 }; 32 }; 33 }; 34 35 soc { 36 ficr: ficr@10000000 { 37 compatible = "nordic,nrf-ficr"; 38 reg = <0x10000000 0x1000>; 39 #nordic,ficr-cells = <1>; 40 status = "okay"; 41 }; 42 43 uicr: uicr@10001000 { 44 compatible = "nordic,nrf-uicr"; 45 reg = <0x10001000 0x1000>; 46 status = "okay"; 47 }; 48 49 sram0: memory@20000000 { 50 compatible = "mmio-sram"; 51 }; 52 53 clock: clock@40000000 { 54 compatible = "nordic,nrf-clock"; 55 reg = <0x40000000 0x1000>; 56 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 57 status = "okay"; 58 }; 59 60 power: power@40000000 { 61 compatible = "nordic,nrf-power"; 62 reg = <0x40000000 0x1000>; 63 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 64 status = "okay"; 65 #address-cells = <1>; 66 #size-cells = <1>; 67 68 gpregret1: gpregret1@4000051c { 69 #address-cells = <1>; 70 #size-cells = <1>; 71 compatible = "nordic,nrf-gpregret"; 72 reg = <0x4000051c 0x1>; 73 status = "okay"; 74 }; 75 76 gpregret2: gpregret2@40000520 { 77 #address-cells = <1>; 78 #size-cells = <1>; 79 compatible = "nordic,nrf-gpregret"; 80 reg = <0x40000520 0x1>; 81 status = "okay"; 82 }; 83 }; 84 85 bprot: bprot@40000000 { 86 compatible = "nordic,nrf-bprot"; 87 reg = <0x40000000 0x1000>; 88 status = "okay"; 89 }; 90 91 radio: radio@40001000 { 92 compatible = "nordic,nrf-radio"; 93 reg = <0x40001000 0x1000>; 94 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 95 status = "okay"; 96 dfe-supported; 97 ieee802154-supported; 98 ble-2mbps-supported; 99 ble-coded-phy-supported; 100 101 ieee802154: ieee802154 { 102 compatible = "nordic,nrf-ieee802154"; 103 status = "disabled"; 104 }; 105 }; 106 107 uart0: uart@40002000 { 108 /* uart can be either UART or UARTE, for the user to pick */ 109 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 110 compatible = "nordic,nrf-uarte"; 111 reg = <0x40002000 0x1000>; 112 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 113 status = "disabled"; 114 }; 115 116 i2c0: i2c@40003000 { 117 /* 118 * This i2c node can be TWI, TWIM, or TWIS, 119 * for the user to pick: 120 * compatible = "nordic,nrf-twi" or 121 * "nordic,nrf-twim" or 122 * "nordic,nrf-twis". 123 */ 124 compatible = "nordic,nrf-twim"; 125 #address-cells = <1>; 126 #size-cells = <0>; 127 reg = <0x40003000 0x1000>; 128 clock-frequency = <I2C_BITRATE_STANDARD>; 129 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 130 easydma-maxcnt-bits = <14>; 131 status = "disabled"; 132 }; 133 134 spi1: spi@40003000 { 135 /* cannot be used with i2c0 */ 136 /* 137 * This spi node can be SPI, SPIM, or SPIS, 138 * for the user to pick: 139 * compatible = "nordic,nrf-spi" or 140 * "nordic,nrf-spim" or 141 * "nordic,nrf-spis". 142 */ 143 compatible = "nordic,nrf-spim"; 144 #address-cells = <1>; 145 #size-cells = <0>; 146 reg = <0x40003000 0x1000>; 147 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 148 max-frequency = <DT_FREQ_M(8)>; 149 easydma-maxcnt-bits = <14>; 150 status = "disabled"; 151 }; 152 153 spi0: spi@40004000 { 154 /* 155 * This spi node can be SPI, SPIM, or SPIS, 156 * for the user to pick: 157 * compatible = "nordic,nrf-spi" or 158 * "nordic,nrf-spim" or 159 * "nordic,nrf-spis". 160 */ 161 compatible = "nordic,nrf-spim"; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 reg = <0x40004000 0x1000>; 165 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 166 max-frequency = <DT_FREQ_M(8)>; 167 easydma-maxcnt-bits = <14>; 168 status = "disabled"; 169 }; 170 171 gpiote: gpiote0: gpiote@40006000 { 172 compatible = "nordic,nrf-gpiote"; 173 reg = <0x40006000 0x1000>; 174 interrupts = <6 5>; 175 status = "disabled"; 176 instance = <0>; 177 }; 178 179 adc: adc@40007000 { 180 compatible = "nordic,nrf-saadc"; 181 reg = <0x40007000 0x1000>; 182 interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>; 183 status = "disabled"; 184 #io-channel-cells = <1>; 185 }; 186 187 timer0: timer@40008000 { 188 compatible = "nordic,nrf-timer"; 189 status = "disabled"; 190 reg = <0x40008000 0x1000>; 191 cc-num = <4>; 192 max-bit-width = <32>; 193 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 194 prescaler = <0>; 195 }; 196 197 timer1: timer@40009000 { 198 compatible = "nordic,nrf-timer"; 199 status = "disabled"; 200 reg = <0x40009000 0x1000>; 201 cc-num = <4>; 202 max-bit-width = <32>; 203 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 204 prescaler = <0>; 205 }; 206 207 timer2: timer@4000a000 { 208 compatible = "nordic,nrf-timer"; 209 status = "disabled"; 210 reg = <0x4000a000 0x1000>; 211 cc-num = <4>; 212 max-bit-width = <32>; 213 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 214 prescaler = <0>; 215 }; 216 217 rtc0: rtc@4000b000 { 218 compatible = "nordic,nrf-rtc"; 219 reg = <0x4000b000 0x1000>; 220 cc-num = <3>; 221 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 222 status = "disabled"; 223 clock-frequency = <32768>; 224 prescaler = <1>; 225 }; 226 227 temp: temp@4000c000 { 228 compatible = "nordic,nrf-temp"; 229 reg = <0x4000c000 0x1000>; 230 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 231 status = "okay"; 232 }; 233 234 rng: random@4000d000 { 235 compatible = "nordic,nrf-rng"; 236 reg = <0x4000d000 0x1000>; 237 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 238 status = "okay"; 239 }; 240 241 ecb: ecb@4000e000 { 242 compatible = "nordic,nrf-ecb"; 243 reg = <0x4000e000 0x1000>; 244 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 245 status = "okay"; 246 }; 247 248 ccm: ccm@4000f000 { 249 compatible = "nordic,nrf-ccm"; 250 reg = <0x4000f000 0x1000>; 251 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 252 length-field-length-8-bits; 253 status = "okay"; 254 }; 255 256 wdt: wdt0: watchdog@40010000 { 257 compatible = "nordic,nrf-wdt"; 258 reg = <0x40010000 0x1000>; 259 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 260 status = "okay"; 261 }; 262 263 rtc1: rtc@40011000 { 264 compatible = "nordic,nrf-rtc"; 265 reg = <0x40011000 0x1000>; 266 cc-num = <4>; 267 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 268 status = "disabled"; 269 clock-frequency = <32768>; 270 prescaler = <1>; 271 }; 272 273 qdec: qdec0: qdec@40012000 { 274 compatible = "nordic,nrf-qdec"; 275 reg = <0x40012000 0x1000>; 276 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 277 status = "disabled"; 278 }; 279 280 comp: comparator@40013000 { 281 compatible = "nordic,nrf-comp"; 282 reg = <0x40013000 0x1000>; 283 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 284 status = "disabled"; 285 #io-channel-cells = <1>; 286 }; 287 288 egu0: swi0: egu@40014000 { 289 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 290 reg = <0x40014000 0x1000>; 291 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 292 status = "okay"; 293 }; 294 295 egu1: swi1: egu@40015000 { 296 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 297 reg = <0x40015000 0x1000>; 298 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 299 status = "okay"; 300 }; 301 302 swi2: swi@40016000 { 303 compatible = "nordic,nrf-swi"; 304 reg = <0x40016000 0x1000>; 305 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 306 status = "okay"; 307 }; 308 309 swi3: swi@40017000 { 310 compatible = "nordic,nrf-swi"; 311 reg = <0x40017000 0x1000>; 312 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 313 status = "okay"; 314 }; 315 316 swi4: swi@40018000 { 317 compatible = "nordic,nrf-swi"; 318 reg = <0x40018000 0x1000>; 319 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 320 status = "okay"; 321 }; 322 323 swi5: swi@40019000 { 324 compatible = "nordic,nrf-swi"; 325 reg = <0x40019000 0x1000>; 326 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 327 status = "okay"; 328 }; 329 330 pwm0: pwm@4001c000 { 331 compatible = "nordic,nrf-pwm"; 332 reg = <0x4001c000 0x1000>; 333 interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; 334 status = "disabled"; 335 #pwm-cells = <3>; 336 }; 337 338 pdm0: pdm@4001d000 { 339 compatible = "nordic,nrf-pdm"; 340 reg = <0x4001d000 0x1000>; 341 interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; 342 status = "disabled"; 343 }; 344 345 flash_controller: flash-controller@4001e000 { 346 compatible = "nordic,nrf52-flash-controller"; 347 reg = <0x4001e000 0x1000>; 348 partial-erase; 349 350 #address-cells = <1>; 351 #size-cells = <1>; 352 353 354 flash0: flash@0 { 355 compatible = "soc-nv-flash"; 356 erase-block-size = <4096>; 357 write-block-size = <4>; 358 }; 359 }; 360 361 ppi: ppi@4001f000 { 362 compatible = "nordic,nrf-ppi"; 363 reg = <0x4001f000 0x1000>; 364 status = "okay"; 365 }; 366 367 gpio0: gpio@50000000 { 368 compatible = "nordic,nrf-gpio"; 369 gpio-controller; 370 /* This way of addressing is used to be compatible */ 371 /* with nrf52840.dtsi */ 372 reg = <0x50000000 0x200 373 0x50000500 0x300>; 374 #gpio-cells = <2>; 375 status = "disabled"; 376 port = <0>; 377 gpiote-instance = <&gpiote>; 378 }; 379 }; 380}; 381 382&nvic { 383 arm,num-irq-priority-bits = <3>; 384}; 385 386&systick { 387 /* Use RTC for system clock, instead of SysTick. */ 388 status = "disabled"; 389}; 390