1 /*
2 * Copyright (c) 2017, Christian Taedcke
3 * Copyright (c) 2020 Lemonbeat GmbH
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #include <errno.h>
9 #include <zephyr/drivers/uart.h>
10 #include <zephyr/irq.h>
11 #include <em_usart.h>
12 #include <em_cmu.h>
13 #include <soc.h>
14
15 #ifdef CONFIG_PINCTRL
16 #include <zephyr/drivers/pinctrl.h>
17 #else
18 #include <em_gpio.h>
19 #endif /* CONFIG_PINCTRL */
20
21 #if DT_NODE_HAS_PROP(id, peripheral_id)
22 #define USART_PREFIX cmuClock_USART
23 #define UART_PREFIX cmuClock_UART
24 #define CLOCK_USART(id) _CONCAT(USART_PREFIX, id)
25 #define CLOCK_UART(id) _CONCAT(UART_PREFIX, id)
26 #define GET_GECKO_USART_CLOCK(id) CLOCK_USART(DT_INST_PROP(id, peripheral_id))
27 #define GET_GECKO_UART_CLOCK(id) CLOCK_UART(DT_INST_PROP(id, peripheral_id))
28 #else
29 #if (USART_COUNT == 1)
30 #define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
31 : -1)
32 #elif (USART_COUNT == 2)
33 #define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
34 : ((ref) == USART1) ? cmuClock_USART1 \
35 : -1)
36 #elif (USART_COUNT == 3)
37 #define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
38 : ((ref) == USART1) ? cmuClock_USART1 \
39 : ((ref) == USART2) ? cmuClock_USART2 \
40 : -1)
41 #elif (USART_COUNT == 4)
42 #define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
43 : ((ref) == USART1) ? cmuClock_USART1 \
44 : ((ref) == USART2) ? cmuClock_USART2 \
45 : ((ref) == USART3) ? cmuClock_USART3 \
46 : -1)
47 #elif (USART_COUNT == 5)
48 #define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
49 : ((ref) == USART1) ? cmuClock_USART1 \
50 : ((ref) == USART2) ? cmuClock_USART2 \
51 : ((ref) == USART3) ? cmuClock_USART3 \
52 : ((ref) == USART4) ? cmuClock_USART4 \
53 : -1)
54 #elif (USART_COUNT == 6)
55 #define CLOCK_USART(ref) (((ref) == USART0) ? cmuClock_USART0 \
56 : ((ref) == USART1) ? cmuClock_USART1 \
57 : ((ref) == USART2) ? cmuClock_USART2 \
58 : ((ref) == USART3) ? cmuClock_USART3 \
59 : ((ref) == USART4) ? cmuClock_USART4 \
60 : ((ref) == USART5) ? cmuClock_USART5 \
61 : -1)
62 #else
63 #error "Undefined number of USARTs."
64 #endif /* USART_COUNT */
65
66 #define CLOCK_UART(ref) (((ref) == UART0) ? cmuClock_UART0 \
67 : ((ref) == UART1) ? cmuClock_UART1 \
68 : -1)
69 #define GET_GECKO_USART_CLOCK(id) CLOCK_USART((USART_TypeDef *)DT_INST_REG_ADDR(id))
70 #define GET_GECKO_UART_CLOCK(id) CLOCK_UART((USART_TypeDef *)DT_INST_REG_ADDR(id))
71 #endif /* DT_NODE_HAS_PROP(id, peripheral_id) */
72
73 /* Helper define to determine if SOC supports hardware flow control */
74 #if ((_SILICON_LABS_32B_SERIES > 0) || \
75 (defined(_USART_ROUTEPEN_RTSPEN_MASK) && \
76 defined(_USART_ROUTEPEN_CTSPEN_MASK)))
77 #define HW_FLOWCONTROL_IS_SUPPORTED_BY_SOC
78 #endif
79
80 #define HAS_HFC_OR(inst) DT_INST_PROP(inst, hw_flow_control) ||
81
82 #define DT_DRV_COMPAT silabs_gecko_uart
83
84 /* Has any enabled uart instance hw-flow-control enabled? */
85 #define UART_GECKO_UART_HW_FLOW_CONTROL_ENABLED \
86 DT_INST_FOREACH_STATUS_OKAY(HAS_HFC_OR) 0
87
88 #undef DT_DRV_COMPAT
89 #define DT_DRV_COMPAT silabs_gecko_usart
90
91 /* Has any enabled usart instance hw-flow-control enabled? */
92 #define UART_GECKO_USART_HW_FLOW_CONTROL_ENABLED \
93 DT_INST_FOREACH_STATUS_OKAY(HAS_HFC_OR) 0
94
95 #if UART_GECKO_USART_HW_FLOW_CONTROL_ENABLED || \
96 UART_GECKO_UART_HW_FLOW_CONTROL_ENABLED
97 #define UART_GECKO_HW_FLOW_CONTROL
98 #endif
99
100 /* Sanity check for hardware flow control */
101 #if defined(UART_GECKO_HW_FLOW_CONTROL) && \
102 (!(defined(HW_FLOWCONTROL_IS_SUPPORTED_BY_SOC)))
103 #error "Hardware flow control is activated for at least one UART/USART, \
104 but not supported by this SOC"
105 #endif
106
107 #if defined(UART_GECKO_HW_FLOW_CONTROL) && \
108 (!defined(CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION) && \
109 !defined(GPIO_USART_ROUTEEN_RTSPEN))
110 #error "Driver not supporting hardware flow control for this SOC"
111 #endif
112
113 /**
114 * @brief Config struct for UART
115 */
116
117 struct uart_gecko_config {
118 #ifdef CONFIG_PINCTRL
119 const struct pinctrl_dev_config *pcfg;
120 #endif /* CONFIG_PINCTRL */
121 USART_TypeDef *base;
122 CMU_Clock_TypeDef clock;
123 uint32_t baud_rate;
124 #ifndef CONFIG_PINCTRL
125 #ifdef UART_GECKO_HW_FLOW_CONTROL
126 bool hw_flowcontrol;
127 #endif /* UART_GECKO_HW_FLOW_CONTROL */
128 #endif
129 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
130 void (*irq_config_func)(const struct device *dev);
131 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
132 #ifndef CONFIG_PINCTRL
133 struct soc_gpio_pin pin_rx;
134 struct soc_gpio_pin pin_tx;
135 #ifdef UART_GECKO_HW_FLOW_CONTROL
136 struct soc_gpio_pin pin_rts;
137 struct soc_gpio_pin pin_cts;
138 #endif /* UART_GECKO_HW_FLOW_CONTROL */
139 #ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
140 uint8_t loc_rx;
141 uint8_t loc_tx;
142 #ifdef UART_GECKO_HW_FLOW_CONTROL
143 uint8_t loc_rts;
144 uint8_t loc_cts;
145 #endif /* UART_GECKO_HW_FLOW_CONTROL */
146 #else /* CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION */
147 uint8_t loc;
148 #endif /* CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION */
149 #endif
150 };
151
152 struct uart_gecko_data {
153 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
154 uart_irq_callback_user_data_t callback;
155 void *cb_data;
156 #endif
157 };
158
uart_gecko_poll_in(const struct device * dev,unsigned char * c)159 static int uart_gecko_poll_in(const struct device *dev, unsigned char *c)
160 {
161 const struct uart_gecko_config *config = dev->config;
162 uint32_t flags = USART_StatusGet(config->base);
163
164 if (flags & USART_STATUS_RXDATAV) {
165 *c = USART_Rx(config->base);
166 return 0;
167 }
168
169 return -1;
170 }
171
uart_gecko_poll_out(const struct device * dev,unsigned char c)172 static void uart_gecko_poll_out(const struct device *dev, unsigned char c)
173 {
174 const struct uart_gecko_config *config = dev->config;
175
176 USART_Tx(config->base, c);
177 }
178
uart_gecko_err_check(const struct device * dev)179 static int uart_gecko_err_check(const struct device *dev)
180 {
181 const struct uart_gecko_config *config = dev->config;
182 uint32_t flags = USART_IntGet(config->base);
183 int err = 0;
184
185 if (flags & USART_IF_RXOF) {
186 err |= UART_ERROR_OVERRUN;
187 }
188
189 if (flags & USART_IF_PERR) {
190 err |= UART_ERROR_PARITY;
191 }
192
193 if (flags & USART_IF_FERR) {
194 err |= UART_ERROR_FRAMING;
195 }
196
197 USART_IntClear(config->base, USART_IF_RXOF |
198 USART_IF_PERR |
199 USART_IF_FERR);
200
201 return err;
202 }
203
204 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_gecko_fifo_fill(const struct device * dev,const uint8_t * tx_data,int len)205 static int uart_gecko_fifo_fill(const struct device *dev, const uint8_t *tx_data,
206 int len)
207 {
208 const struct uart_gecko_config *config = dev->config;
209 uint8_t num_tx = 0U;
210
211 while ((len - num_tx > 0) &&
212 (config->base->STATUS & USART_STATUS_TXBL)) {
213
214 config->base->TXDATA = (uint32_t)tx_data[num_tx++];
215 }
216
217 return num_tx;
218 }
219
uart_gecko_fifo_read(const struct device * dev,uint8_t * rx_data,const int len)220 static int uart_gecko_fifo_read(const struct device *dev, uint8_t *rx_data,
221 const int len)
222 {
223 const struct uart_gecko_config *config = dev->config;
224 uint8_t num_rx = 0U;
225
226 while ((len - num_rx > 0) &&
227 (config->base->STATUS & USART_STATUS_RXDATAV)) {
228
229 rx_data[num_rx++] = (uint8_t)config->base->RXDATA;
230 }
231
232 return num_rx;
233 }
234
uart_gecko_irq_tx_enable(const struct device * dev)235 static void uart_gecko_irq_tx_enable(const struct device *dev)
236 {
237 const struct uart_gecko_config *config = dev->config;
238 uint32_t mask = USART_IEN_TXBL | USART_IEN_TXC;
239
240 USART_IntEnable(config->base, mask);
241 }
242
uart_gecko_irq_tx_disable(const struct device * dev)243 static void uart_gecko_irq_tx_disable(const struct device *dev)
244 {
245 const struct uart_gecko_config *config = dev->config;
246 uint32_t mask = USART_IEN_TXBL | USART_IEN_TXC;
247
248 USART_IntDisable(config->base, mask);
249 }
250
uart_gecko_irq_tx_complete(const struct device * dev)251 static int uart_gecko_irq_tx_complete(const struct device *dev)
252 {
253 const struct uart_gecko_config *config = dev->config;
254 uint32_t flags = USART_IntGet(config->base);
255
256 USART_IntClear(config->base, USART_IF_TXC);
257
258 return (flags & USART_IF_TXC) != 0U;
259 }
260
uart_gecko_irq_tx_ready(const struct device * dev)261 static int uart_gecko_irq_tx_ready(const struct device *dev)
262 {
263 const struct uart_gecko_config *config = dev->config;
264 uint32_t flags = USART_IntGetEnabled(config->base);
265
266 return (flags & USART_IF_TXBL) != 0U;
267 }
268
uart_gecko_irq_rx_enable(const struct device * dev)269 static void uart_gecko_irq_rx_enable(const struct device *dev)
270 {
271 const struct uart_gecko_config *config = dev->config;
272 uint32_t mask = USART_IEN_RXDATAV;
273
274 USART_IntEnable(config->base, mask);
275 }
276
uart_gecko_irq_rx_disable(const struct device * dev)277 static void uart_gecko_irq_rx_disable(const struct device *dev)
278 {
279 const struct uart_gecko_config *config = dev->config;
280 uint32_t mask = USART_IEN_RXDATAV;
281
282 USART_IntDisable(config->base, mask);
283 }
284
uart_gecko_irq_rx_full(const struct device * dev)285 static int uart_gecko_irq_rx_full(const struct device *dev)
286 {
287 const struct uart_gecko_config *config = dev->config;
288 uint32_t flags = USART_IntGet(config->base);
289
290 return (flags & USART_IF_RXDATAV) != 0U;
291 }
292
uart_gecko_irq_rx_ready(const struct device * dev)293 static int uart_gecko_irq_rx_ready(const struct device *dev)
294 {
295 const struct uart_gecko_config *config = dev->config;
296 uint32_t mask = USART_IEN_RXDATAV;
297
298 return (config->base->IEN & mask)
299 && uart_gecko_irq_rx_full(dev);
300 }
301
uart_gecko_irq_err_enable(const struct device * dev)302 static void uart_gecko_irq_err_enable(const struct device *dev)
303 {
304 const struct uart_gecko_config *config = dev->config;
305
306 USART_IntEnable(config->base, USART_IF_RXOF |
307 USART_IF_PERR |
308 USART_IF_FERR);
309 }
310
uart_gecko_irq_err_disable(const struct device * dev)311 static void uart_gecko_irq_err_disable(const struct device *dev)
312 {
313 const struct uart_gecko_config *config = dev->config;
314
315 USART_IntDisable(config->base, USART_IF_RXOF |
316 USART_IF_PERR |
317 USART_IF_FERR);
318 }
319
uart_gecko_irq_is_pending(const struct device * dev)320 static int uart_gecko_irq_is_pending(const struct device *dev)
321 {
322 return uart_gecko_irq_tx_ready(dev) || uart_gecko_irq_rx_ready(dev);
323 }
324
uart_gecko_irq_update(const struct device * dev)325 static int uart_gecko_irq_update(const struct device *dev)
326 {
327 return 1;
328 }
329
uart_gecko_irq_callback_set(const struct device * dev,uart_irq_callback_user_data_t cb,void * cb_data)330 static void uart_gecko_irq_callback_set(const struct device *dev,
331 uart_irq_callback_user_data_t cb,
332 void *cb_data)
333 {
334 struct uart_gecko_data *data = dev->data;
335
336 data->callback = cb;
337 data->cb_data = cb_data;
338 }
339
uart_gecko_isr(const struct device * dev)340 static void uart_gecko_isr(const struct device *dev)
341 {
342 struct uart_gecko_data *data = dev->data;
343
344 if (data->callback) {
345 data->callback(dev, data->cb_data);
346 }
347 }
348 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
349
350 /**
351 * @brief Subroutine initializer of UART pins
352 *
353 * @param dev UART device to configure
354 */
355 #ifndef CONFIG_PINCTRL
uart_gecko_init_pins(const struct device * dev)356 static void uart_gecko_init_pins(const struct device *dev)
357 {
358 const struct uart_gecko_config *config = dev->config;
359
360 /* Configure RX and TX */
361 GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin,
362 config->pin_rx.mode, config->pin_rx.out);
363 GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin,
364 config->pin_tx.mode, config->pin_tx.out);
365
366 #ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
367 /* For SOCs with configurable pin locations (set in SOC Kconfig) */
368 config->base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN;
369 config->base->ROUTELOC0 =
370 (config->loc_tx << _USART_ROUTELOC0_TXLOC_SHIFT) |
371 (config->loc_rx << _USART_ROUTELOC0_RXLOC_SHIFT);
372 config->base->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE;
373 #elif defined(USART_ROUTE_RXPEN) && defined(USART_ROUTE_TXPEN)
374 /* For olders SOCs with only one pin location */
375 config->base->ROUTE = USART_ROUTE_RXPEN | USART_ROUTE_TXPEN
376 | (config->loc << 8);
377 #elif defined(GPIO_USART_ROUTEEN_RXPEN) && defined(GPIO_USART_ROUTEEN_TXPEN)
378 GPIO->USARTROUTE[USART_NUM(config->base)].ROUTEEN =
379 GPIO_USART_ROUTEEN_TXPEN | GPIO_USART_ROUTEEN_RXPEN;
380 GPIO->USARTROUTE[USART_NUM(config->base)].TXROUTE =
381 (config->pin_tx.pin << _GPIO_USART_TXROUTE_PIN_SHIFT) |
382 (config->pin_tx.port << _GPIO_USART_TXROUTE_PORT_SHIFT);
383 GPIO->USARTROUTE[USART_NUM(config->base)].RXROUTE =
384 (config->pin_rx.pin << _GPIO_USART_RXROUTE_PIN_SHIFT) |
385 (config->pin_rx.port << _GPIO_USART_RXROUTE_PORT_SHIFT);
386 #endif /* CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION */
387
388 #ifdef UART_GECKO_HW_FLOW_CONTROL
389 /* Configure HW flow control (RTS, CTS) */
390 if (config->hw_flowcontrol) {
391 GPIO_PinModeSet(config->pin_rts.port, config->pin_rts.pin,
392 config->pin_rts.mode, config->pin_rts.out);
393 GPIO_PinModeSet(config->pin_cts.port, config->pin_cts.pin,
394 config->pin_cts.mode, config->pin_cts.out);
395
396 #ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
397 config->base->ROUTEPEN =
398 USART_ROUTEPEN_RXPEN |
399 USART_ROUTEPEN_TXPEN |
400 USART_ROUTEPEN_RTSPEN |
401 USART_ROUTEPEN_CTSPEN;
402
403 config->base->ROUTELOC1 =
404 (config->loc_rts << _USART_ROUTELOC1_RTSLOC_SHIFT) |
405 (config->loc_cts << _USART_ROUTELOC1_CTSLOC_SHIFT);
406 #elif defined(GPIO_USART_ROUTEEN_RTSPEN) && defined(GPIO_USART_ROUTEEN_CTSPEN)
407 GPIO->USARTROUTE[USART_NUM(config->base)].ROUTEEN =
408 GPIO_USART_ROUTEEN_TXPEN |
409 GPIO_USART_ROUTEEN_RXPEN |
410 GPIO_USART_ROUTEPEN_RTSPEN |
411 GPIO_USART_ROUTEPEN_CTSPEN;
412
413 GPIO->USARTROUTE[USART_NUM(config->base)].RTSROUTE =
414 (config->pin_rts.pin << _GPIO_USART_RTSROUTE_PIN_SHIFT) |
415 (config->pin_rts.port << _GPIO_USART_RTSROUTE_PORT_SHIFT);
416 GPIO->USARTROUTE[USART_NUM(config->base)].CTSROUTE =
417 (config->pin_cts.pin << _GPIO_USART_CTSROUTE_PIN_SHIFT) |
418 (config->pin_cts.port << _GPIO_USART_CTSROUTE_PORT_SHIFT);
419 #endif /* CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION */
420 }
421 #endif /* UART_GECKO_HW_FLOW_CONTROL */
422 }
423 #endif /* !CONFIG_PINCTRL */
424
425 /**
426 * @brief Main initializer for UART
427 *
428 * @param dev UART device to be initialized
429 * @return int 0
430 */
uart_gecko_init(const struct device * dev)431 static int uart_gecko_init(const struct device *dev)
432 {
433 #ifdef CONFIG_PINCTRL
434 int err;
435 #endif /* CONFIG_PINCTRL */
436 const struct uart_gecko_config *config = dev->config;
437
438 USART_InitAsync_TypeDef usartInit = USART_INITASYNC_DEFAULT;
439
440 /* The peripheral and gpio clock are already enabled from soc and gpio
441 * driver
442 */
443
444 /* Enable USART clock */
445 CMU_ClockEnable(config->clock, true);
446
447 /* Init USART */
448 usartInit.baudrate = config->baud_rate;
449 #ifdef UART_GECKO_HW_FLOW_CONTROL
450 usartInit.hwFlowControl = config->hw_flowcontrol ?
451 usartHwFlowControlCtsAndRts : usartHwFlowControlNone;
452 #endif
453 USART_InitAsync(config->base, &usartInit);
454
455 #ifdef CONFIG_PINCTRL
456 err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
457 if (err < 0) {
458 return err;
459 }
460 #else
461 /* Initialize USART pins */
462 uart_gecko_init_pins(dev);
463 #endif /* CONFIG_PINCTRL */
464
465 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
466 config->irq_config_func(dev);
467 #endif
468
469 return 0;
470 }
471
472 static const struct uart_driver_api uart_gecko_driver_api = {
473 .poll_in = uart_gecko_poll_in,
474 .poll_out = uart_gecko_poll_out,
475 .err_check = uart_gecko_err_check,
476 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
477 .fifo_fill = uart_gecko_fifo_fill,
478 .fifo_read = uart_gecko_fifo_read,
479 .irq_tx_enable = uart_gecko_irq_tx_enable,
480 .irq_tx_disable = uart_gecko_irq_tx_disable,
481 .irq_tx_complete = uart_gecko_irq_tx_complete,
482 .irq_tx_ready = uart_gecko_irq_tx_ready,
483 .irq_rx_enable = uart_gecko_irq_rx_enable,
484 .irq_rx_disable = uart_gecko_irq_rx_disable,
485 .irq_rx_ready = uart_gecko_irq_rx_ready,
486 .irq_err_enable = uart_gecko_irq_err_enable,
487 .irq_err_disable = uart_gecko_irq_err_disable,
488 .irq_is_pending = uart_gecko_irq_is_pending,
489 .irq_update = uart_gecko_irq_update,
490 .irq_callback_set = uart_gecko_irq_callback_set,
491 #endif
492 };
493
494 #undef DT_DRV_COMPAT
495 #define DT_DRV_COMPAT silabs_gecko_uart
496
497 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
498 #define GECKO_UART_IRQ_HANDLER_DECL(idx) \
499 static void uart_gecko_config_func_##idx(const struct device *dev)
500 #define GECKO_UART_IRQ_HANDLER_FUNC(idx) \
501 .irq_config_func = uart_gecko_config_func_##idx,
502 #define GECKO_UART_IRQ_HANDLER(idx) \
503 static void uart_gecko_config_func_##idx(const struct device *dev) \
504 { \
505 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, rx, irq), \
506 DT_INST_IRQ_BY_NAME(idx, rx, priority), \
507 uart_gecko_isr, DEVICE_DT_INST_GET(idx), 0); \
508 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, tx, irq), \
509 DT_INST_IRQ_BY_NAME(idx, tx, priority), \
510 uart_gecko_isr, DEVICE_DT_INST_GET(idx), 0); \
511 \
512 irq_enable(DT_INST_IRQ_BY_NAME(idx, rx, irq)); \
513 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \
514 }
515 #else /* CONFIG_UART_INTERRUPT_DRIVEN */
516 #define GECKO_UART_IRQ_HANDLER_DECL(idx)
517 #define GECKO_UART_IRQ_HANDLER_FUNC(idx)
518 #define GECKO_UART_IRQ_HANDLER(idx)
519 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
520
521 #ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
522 #define GECKO_UART_RX_TX_PIN_LOCATIONS(idx) \
523 .loc_rx = DT_INST_PROP_BY_IDX(idx, location_rx, 0), \
524 .loc_tx = DT_INST_PROP_BY_IDX(idx, location_tx, 0),
525 #define VALIDATE_GECKO_UART_RX_TX_PIN_LOCATIONS(idx)
526 #else
527 #define GECKO_UART_RX_TX_PIN_LOCATIONS(idx) \
528 .loc = DT_INST_PROP_BY_IDX(idx, location_rx, 0),
529 #define VALIDATE_GECKO_UART_RX_TX_PIN_LOCATIONS(idx) \
530 BUILD_ASSERT(DT_INST_PROP_BY_IDX(idx, location_rx, 0) == \
531 DT_INST_PROP_BY_IDX(idx, location_tx, 0), \
532 "DTS location-* properties must have identical value")
533 #endif
534
535 #define PIN_UART_RXD(idx) \
536 { \
537 DT_INST_PROP_BY_IDX(idx, location_rx, 1), \
538 DT_INST_PROP_BY_IDX(idx, location_rx, 2), \
539 gpioModeInput, 1 \
540 }
541 #define PIN_UART_TXD(idx) \
542 { \
543 DT_INST_PROP_BY_IDX(idx, location_tx, 1), \
544 DT_INST_PROP_BY_IDX(idx, location_tx, 2), \
545 gpioModePushPull, 1 \
546 }
547
548 #define GECKO_UART_RX_TX_PINS(idx) \
549 .pin_rx = PIN_UART_RXD(idx), \
550 .pin_tx = PIN_UART_TXD(idx),
551
552 #ifdef UART_GECKO_HW_FLOW_CONTROL
553
554 #ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
555 #define GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx) \
556 .loc_rts = COND_CODE_1(DT_INST_PROP(idx, hw_flow_control), \
557 (DT_INST_PROP_BY_IDX(idx, location_rts, 0)), \
558 (0)), \
559 .loc_cts = COND_CODE_1(DT_INST_PROP(idx, hw_flow_control), \
560 (DT_INST_PROP_BY_IDX(idx, location_cts, 0)), \
561 (0)),
562 #define VALIDATE_GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx) \
563 COND_CODE_1(DT_INST_PROP(idx, hw_flow_control), \
564 (BUILD_ASSERT(DT_INST_NODE_HAS_PROP(idx, location_rts) && \
565 DT_INST_NODE_HAS_PROP(idx, location_cts), \
566 "DTS location-rts and location-cts are mandatory")), \
567 ())
568 #else /* CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION */
569 /* Hardware flow control not supported for these SOCs */
570 #define GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx)
571 #define VALIDATE_GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx)
572 #endif /* CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION */
573
574 #define PIN_UART_RTS(idx) \
575 COND_CODE_1(DT_INST_PROP(idx, hw_flow_control), \
576 ({ \
577 DT_INST_PROP_BY_IDX(idx, location_rts, 1), \
578 DT_INST_PROP_BY_IDX(idx, location_rts, 2), \
579 gpioModePushPull, 1 \
580 }), \
581 ({0}))
582
583 #define PIN_UART_CTS(idx) \
584 COND_CODE_1(DT_INST_PROP(idx, hw_flow_control), \
585 ({ \
586 DT_INST_PROP_BY_IDX(idx, location_cts, 1), \
587 DT_INST_PROP_BY_IDX(idx, location_cts, 2), \
588 gpioModeInput, 1 \
589 }), \
590 ({0}))
591
592 #define GECKO_UART_RTS_CTS_PINS(idx) \
593 .pin_rts = PIN_UART_RTS(idx), \
594 .pin_cts = PIN_UART_CTS(idx),
595
596 #define GECKO_UART_HW_FLOW_CONTROL(idx) \
597 .hw_flowcontrol = DT_INST_PROP(idx, hw_flow_control),
598
599 #else /* UART_GECKO_HW_FLOW_CONTROL */
600
601 #define GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx)
602 #define VALIDATE_GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx)
603 #define GECKO_UART_RTS_CTS_PINS(idx)
604 #define GECKO_UART_HW_FLOW_CONTROL(idx)
605
606 #endif /* UART_GECKO_HW_FLOW_CONTROL */
607
608 #define GECKO_UART_INIT(idx) \
609 VALIDATE_GECKO_UART_RX_TX_PIN_LOCATIONS(idx); \
610 VALIDATE_GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx); \
611 \
612 GECKO_UART_IRQ_HANDLER_DECL(idx); \
613 \
614 static const struct uart_gecko_config uart_gecko_cfg_##idx = { \
615 .base = (USART_TypeDef *)DT_INST_REG_ADDR(idx), \
616 .clock = GET_GECKO_UART_CLOCK(idx), \
617 .baud_rate = DT_INST_PROP(idx, current_speed), \
618 GECKO_UART_HW_FLOW_CONTROL(idx) \
619 GECKO_UART_RX_TX_PINS(idx) \
620 GECKO_UART_RTS_CTS_PINS(idx) \
621 GECKO_UART_RX_TX_PIN_LOCATIONS(idx) \
622 GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx) \
623 GECKO_UART_IRQ_HANDLER_FUNC(idx) \
624 }; \
625 \
626 static struct uart_gecko_data uart_gecko_data_##idx; \
627 \
628 DEVICE_DT_INST_DEFINE(idx, &uart_gecko_init, \
629 NULL, &uart_gecko_data_##idx, \
630 &uart_gecko_cfg_##idx, PRE_KERNEL_1, \
631 CONFIG_SERIAL_INIT_PRIORITY, \
632 &uart_gecko_driver_api); \
633 \
634 \
635 GECKO_UART_IRQ_HANDLER(idx)
636
637 DT_INST_FOREACH_STATUS_OKAY(GECKO_UART_INIT)
638
639 #undef DT_DRV_COMPAT
640 #define DT_DRV_COMPAT silabs_gecko_usart
641
642 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
643 #define GECKO_USART_IRQ_HANDLER_DECL(idx) \
644 static void usart_gecko_config_func_##idx(const struct device *dev)
645 #define GECKO_USART_IRQ_HANDLER_FUNC(idx) \
646 .irq_config_func = usart_gecko_config_func_##idx,
647 #define GECKO_USART_IRQ_HANDLER(idx) \
648 static void usart_gecko_config_func_##idx(const struct device *dev) \
649 { \
650 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, rx, irq), \
651 DT_INST_IRQ_BY_NAME(idx, rx, priority), \
652 uart_gecko_isr, DEVICE_DT_INST_GET(idx), 0); \
653 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, tx, irq), \
654 DT_INST_IRQ_BY_NAME(idx, tx, priority), \
655 uart_gecko_isr, DEVICE_DT_INST_GET(idx), 0); \
656 \
657 irq_enable(DT_INST_IRQ_BY_NAME(idx, rx, irq)); \
658 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \
659 }
660 #else
661 #define GECKO_USART_IRQ_HANDLER_DECL(idx)
662 #define GECKO_USART_IRQ_HANDLER_FUNC(idx)
663 #define GECKO_USART_IRQ_HANDLER(idx)
664 #endif
665
666 #ifdef CONFIG_PINCTRL
667 #define GECKO_USART_INIT(idx) \
668 PINCTRL_DT_INST_DEFINE(idx); \
669 GECKO_USART_IRQ_HANDLER_DECL(idx); \
670 \
671 static const struct uart_gecko_config usart_gecko_cfg_##idx = { \
672 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
673 .base = (USART_TypeDef *)DT_INST_REG_ADDR(idx), \
674 .clock = GET_GECKO_USART_CLOCK(idx), \
675 .baud_rate = DT_INST_PROP(idx, current_speed), \
676 GECKO_USART_IRQ_HANDLER_FUNC(idx) \
677 }; \
678 \
679 static struct uart_gecko_data usart_gecko_data_##idx; \
680 \
681 DEVICE_DT_INST_DEFINE(idx, &uart_gecko_init, NULL, \
682 &usart_gecko_data_##idx, \
683 &usart_gecko_cfg_##idx, PRE_KERNEL_1, \
684 CONFIG_SERIAL_INIT_PRIORITY, \
685 &uart_gecko_driver_api); \
686 \
687 GECKO_USART_IRQ_HANDLER(idx)
688 #else
689 #define GECKO_USART_INIT(idx) \
690 VALIDATE_GECKO_UART_RX_TX_PIN_LOCATIONS(idx); \
691 VALIDATE_GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx); \
692 \
693 GECKO_USART_IRQ_HANDLER_DECL(idx); \
694 \
695 static const struct uart_gecko_config usart_gecko_cfg_##idx = { \
696 .base = (USART_TypeDef *)DT_INST_REG_ADDR(idx), \
697 .clock = GET_GECKO_USART_CLOCK(idx), \
698 .baud_rate = DT_INST_PROP(idx, current_speed), \
699 GECKO_UART_HW_FLOW_CONTROL(idx) \
700 GECKO_UART_RX_TX_PINS(idx) \
701 GECKO_UART_RTS_CTS_PINS(idx) \
702 GECKO_UART_RX_TX_PIN_LOCATIONS(idx) \
703 GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx) \
704 GECKO_USART_IRQ_HANDLER_FUNC(idx) \
705 }; \
706 \
707 static struct uart_gecko_data usart_gecko_data_##idx; \
708 \
709 DEVICE_DT_INST_DEFINE(idx, &uart_gecko_init, NULL, \
710 &usart_gecko_data_##idx, \
711 &usart_gecko_cfg_##idx, PRE_KERNEL_1, \
712 CONFIG_SERIAL_INIT_PRIORITY, \
713 &uart_gecko_driver_api); \
714 \
715 GECKO_USART_IRQ_HANDLER(idx)
716 #endif
717
718 DT_INST_FOREACH_STATUS_OKAY(GECKO_USART_INIT)
719
