1 /*
2 * Copyright (c) 2021, Linaro Limited.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT arm_cmsdk_uart
8
9 /**
10 * @brief Driver for UART on ARM CMSDK APB UART.
11 *
12 * UART has two wires for RX and TX, and does not provide CTS or RTS.
13 */
14
15 #include <zephyr/kernel.h>
16 #include <zephyr/arch/cpu.h>
17 #include <zephyr/drivers/clock_control/arm_clock_control.h>
18 #include <zephyr/sys/__assert.h>
19 #include <zephyr/init.h>
20 #include <zephyr/drivers/uart.h>
21 #include <zephyr/linker/sections.h>
22 #include <zephyr/irq.h>
23
24 /* UART registers struct */
25 struct uart_cmsdk_apb {
26 /* offset: 0x000 (r/w) data register */
27 volatile uint32_t data;
28 /* offset: 0x004 (r/w) status register */
29 volatile uint32_t state;
30 /* offset: 0x008 (r/w) control register */
31 volatile uint32_t ctrl;
32 union {
33 /* offset: 0x00c (r/ ) interrupt status register */
34 volatile uint32_t intstatus;
35 /* offset: 0x00c ( /w) interrupt clear register */
36 volatile uint32_t intclear;
37 };
38 /* offset: 0x010 (r/w) baudrate divider register */
39 volatile uint32_t bauddiv;
40 };
41
42 /* UART Bits */
43 /* CTRL Register */
44 #define UART_TX_EN (1 << 0)
45 #define UART_RX_EN (1 << 1)
46 #define UART_TX_IN_EN (1 << 2)
47 #define UART_RX_IN_EN (1 << 3)
48 #define UART_TX_OV_EN (1 << 4)
49 #define UART_RX_OV_EN (1 << 5)
50 #define UART_HS_TM_TX (1 << 6)
51
52 /* STATE Register */
53 #define UART_TX_BF (1 << 0)
54 #define UART_RX_BF (1 << 1)
55 #define UART_TX_B_OV (1 << 2)
56 #define UART_RX_B_OV (1 << 3)
57
58 /* INTSTATUS Register */
59 #define UART_TX_IN (1 << 0)
60 #define UART_RX_IN (1 << 1)
61 #define UART_TX_OV_IN (1 << 2)
62 #define UART_RX_OV_IN (1 << 3)
63
64 struct uart_cmsdk_apb_config {
65 volatile struct uart_cmsdk_apb *uart;
66 uint32_t sys_clk_freq;
67 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
68 uart_irq_config_func_t irq_config_func;
69 #endif
70 };
71
72 /* Device data structure */
73 struct uart_cmsdk_apb_dev_data {
74 uint32_t baud_rate; /* Baud rate */
75 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
76 uart_irq_callback_user_data_t irq_cb;
77 void *irq_cb_data;
78 #endif
79 /* UART Clock control in Active State */
80 const struct arm_clock_control_t uart_cc_as;
81 /* UART Clock control in Sleep State */
82 const struct arm_clock_control_t uart_cc_ss;
83 /* UART Clock control in Deep Sleep State */
84 const struct arm_clock_control_t uart_cc_dss;
85 };
86
87 static const struct uart_driver_api uart_cmsdk_apb_driver_api;
88 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
89 static void uart_cmsdk_apb_isr(const struct device *dev);
90 #endif
91
92 /**
93 * @brief Set the baud rate
94 *
95 * This routine set the given baud rate for the UART.
96 *
97 * @param dev UART device struct
98 */
baudrate_set(const struct device * dev)99 static void baudrate_set(const struct device *dev)
100 {
101 const struct uart_cmsdk_apb_config * const dev_cfg = dev->config;
102 struct uart_cmsdk_apb_dev_data *const dev_data = dev->data;
103 /*
104 * If baudrate and/or sys_clk_freq are 0 the configuration remains
105 * unchanged. It can be useful in case that Zephyr it is run via
106 * a bootloader that brings up the serial and sets the baudrate.
107 */
108 if ((dev_data->baud_rate != 0U) && (dev_cfg->sys_clk_freq != 0U)) {
109 /* calculate baud rate divisor */
110 dev_cfg->uart->bauddiv = (dev_cfg->sys_clk_freq / dev_data->baud_rate);
111 }
112 }
113
114 /**
115 * @brief Initialize UART channel
116 *
117 * This routine is called to reset the chip in a quiescent state.
118 * It is assumed that this function is called only once per UART.
119 *
120 * @param dev UART device struct
121 *
122 * @return 0
123 */
uart_cmsdk_apb_init(const struct device * dev)124 static int uart_cmsdk_apb_init(const struct device *dev)
125 {
126 const struct uart_cmsdk_apb_config * const dev_cfg = dev->config;
127
128 #ifdef CONFIG_CLOCK_CONTROL
129 /* Enable clock for subsystem */
130 const struct device *const clk = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_IDX(0, 1));
131 struct uart_cmsdk_apb_dev_data * const data = dev->data;
132
133 if (!device_is_ready(clk)) {
134 return -ENODEV;
135 }
136
137 #ifdef CONFIG_SOC_SERIES_BEETLE
138 clock_control_on(clk, (clock_control_subsys_t) &data->uart_cc_as);
139 clock_control_on(clk, (clock_control_subsys_t) &data->uart_cc_ss);
140 clock_control_on(clk, (clock_control_subsys_t) &data->uart_cc_dss);
141 #endif /* CONFIG_SOC_SERIES_BEETLE */
142 #endif /* CONFIG_CLOCK_CONTROL */
143
144 /* Set baud rate */
145 baudrate_set(dev);
146
147 /* Enable receiver and transmitter */
148 dev_cfg->uart->ctrl = UART_RX_EN | UART_TX_EN;
149
150 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
151 dev_cfg->irq_config_func(dev);
152 #endif
153
154 return 0;
155 }
156
157 /**
158 * @brief Poll the device for input.
159 *
160 * @param dev UART device struct
161 * @param c Pointer to character
162 *
163 * @return 0 if a character arrived, -1 if the input buffer if empty.
164 */
165
uart_cmsdk_apb_poll_in(const struct device * dev,unsigned char * c)166 static int uart_cmsdk_apb_poll_in(const struct device *dev, unsigned char *c)
167 {
168 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
169
170 /* If the receiver is not ready returns -1 */
171 if (!(dev_cfg->uart->state & UART_RX_BF)) {
172 return -1;
173 }
174
175 /* got a character */
176 *c = (unsigned char)dev_cfg->uart->data;
177
178 return 0;
179 }
180
181 /**
182 * @brief Output a character in polled mode.
183 *
184 * Checks if the transmitter is empty. If empty, a character is written to
185 * the data register.
186 *
187 * @param dev UART device struct
188 * @param c Character to send
189 */
uart_cmsdk_apb_poll_out(const struct device * dev,unsigned char c)190 static void uart_cmsdk_apb_poll_out(const struct device *dev,
191 unsigned char c)
192 {
193 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
194
195 /* Wait for transmitter to be ready */
196 while (dev_cfg->uart->state & UART_TX_BF) {
197 ; /* Wait */
198 }
199
200 /* Send a character */
201 dev_cfg->uart->data = (uint32_t)c;
202 }
203
204 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
205 /**
206 * @brief Fill FIFO with data
207 *
208 * @param dev UART device struct
209 * @param tx_data Data to transmit
210 * @param len Number of bytes to send
211 *
212 * @return the number of characters that have been read
213 */
uart_cmsdk_apb_fifo_fill(const struct device * dev,const uint8_t * tx_data,int len)214 static int uart_cmsdk_apb_fifo_fill(const struct device *dev,
215 const uint8_t *tx_data, int len)
216 {
217 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
218
219 /*
220 * No hardware FIFO present. Only 1 byte
221 * to write if TX buffer is empty.
222 */
223 if (len && !(dev_cfg->uart->state & UART_TX_BF)) {
224 /*
225 * Clear TX int. pending flag before pushing byte to "FIFO".
226 * If TX interrupt is enabled the UART_TX_IN bit will be set
227 * again automatically by the UART hardware machinery once
228 * the "FIFO" becomes empty again.
229 */
230 dev_cfg->uart->intclear = UART_TX_IN;
231 dev_cfg->uart->data = *tx_data;
232 return 1;
233 }
234
235 return 0;
236 }
237
238 /**
239 * @brief Read data from FIFO
240 *
241 * @param dev UART device struct
242 * @param rx_data Pointer to data container
243 * @param size Container size in bytes
244 *
245 * @return the number of characters that have been read
246 */
uart_cmsdk_apb_fifo_read(const struct device * dev,uint8_t * rx_data,const int size)247 static int uart_cmsdk_apb_fifo_read(const struct device *dev,
248 uint8_t *rx_data, const int size)
249 {
250 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
251
252 /*
253 * No hardware FIFO present. Only 1 byte
254 * to read if RX buffer is full.
255 */
256 if (size && dev_cfg->uart->state & UART_RX_BF) {
257 /*
258 * Clear RX int. pending flag before popping byte from "FIFO".
259 * If RX interrupt is enabled the UART_RX_IN bit will be set
260 * again automatically by the UART hardware machinery once
261 * the "FIFO" becomes full again.
262 */
263 dev_cfg->uart->intclear = UART_RX_IN;
264 *rx_data = (unsigned char)dev_cfg->uart->data;
265 return 1;
266 }
267
268 return 0;
269 }
270
271 /**
272 * @brief Enable TX interrupt
273 *
274 * @param dev UART device struct
275 */
uart_cmsdk_apb_irq_tx_enable(const struct device * dev)276 static void uart_cmsdk_apb_irq_tx_enable(const struct device *dev)
277 {
278 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
279 unsigned int key;
280
281 dev_cfg->uart->ctrl |= UART_TX_IN_EN;
282 /* The expectation is that TX is a level interrupt, active for as
283 * long as TX buffer is empty. But in CMSDK UART it's an edge
284 * interrupt, firing on a state change of TX buffer from full to
285 * empty. So, we need to "prime" it here by calling ISR directly,
286 * to get interrupt processing going, as there is no previous
287 * full state to allow a transition from full to empty buffer
288 * that will trigger a TX interrupt.
289 */
290 key = irq_lock();
291 uart_cmsdk_apb_isr(dev);
292 irq_unlock(key);
293 }
294
295 /**
296 * @brief Disable TX interrupt
297 *
298 * @param dev UART device struct
299 */
uart_cmsdk_apb_irq_tx_disable(const struct device * dev)300 static void uart_cmsdk_apb_irq_tx_disable(const struct device *dev)
301 {
302 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
303
304 dev_cfg->uart->ctrl &= ~UART_TX_IN_EN;
305 /* Clear any pending TX interrupt after disabling it */
306 dev_cfg->uart->intclear = UART_TX_IN;
307 }
308
309 /**
310 * @brief Verify if Tx interrupt has been raised
311 *
312 * @param dev UART device struct
313 *
314 * @return 1 if an interrupt is ready, 0 otherwise
315 */
uart_cmsdk_apb_irq_tx_ready(const struct device * dev)316 static int uart_cmsdk_apb_irq_tx_ready(const struct device *dev)
317 {
318 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
319
320 return !(dev_cfg->uart->state & UART_TX_BF);
321 }
322
323 /**
324 * @brief Enable RX interrupt
325 *
326 * @param dev UART device struct
327 */
uart_cmsdk_apb_irq_rx_enable(const struct device * dev)328 static void uart_cmsdk_apb_irq_rx_enable(const struct device *dev)
329 {
330 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
331
332 dev_cfg->uart->ctrl |= UART_RX_IN_EN;
333 }
334
335 /**
336 * @brief Disable RX interrupt
337 *
338 * @param dev UART device struct
339 */
uart_cmsdk_apb_irq_rx_disable(const struct device * dev)340 static void uart_cmsdk_apb_irq_rx_disable(const struct device *dev)
341 {
342 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
343
344 dev_cfg->uart->ctrl &= ~UART_RX_IN_EN;
345 /* Clear any pending RX interrupt after disabling it */
346 dev_cfg->uart->intclear = UART_RX_IN;
347 }
348
349 /**
350 * @brief Verify if Tx complete interrupt has been raised
351 *
352 * @param dev UART device struct
353 *
354 * @return 1 if an interrupt is ready, 0 otherwise
355 */
uart_cmsdk_apb_irq_tx_complete(const struct device * dev)356 static int uart_cmsdk_apb_irq_tx_complete(const struct device *dev)
357 {
358 return uart_cmsdk_apb_irq_tx_ready(dev);
359 }
360
361 /**
362 * @brief Verify if Rx interrupt has been raised
363 *
364 * @param dev UART device struct
365 *
366 * @return 1 if an interrupt is ready, 0 otherwise
367 */
uart_cmsdk_apb_irq_rx_ready(const struct device * dev)368 static int uart_cmsdk_apb_irq_rx_ready(const struct device *dev)
369 {
370 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
371
372 return (dev_cfg->uart->state & UART_RX_BF) == UART_RX_BF;
373 }
374
375 /**
376 * @brief Enable error interrupt
377 *
378 * @param dev UART device struct
379 */
uart_cmsdk_apb_irq_err_enable(const struct device * dev)380 static void uart_cmsdk_apb_irq_err_enable(const struct device *dev)
381 {
382 ARG_UNUSED(dev);
383 }
384
385 /**
386 * @brief Disable error interrupt
387 *
388 * @param dev UART device struct
389 */
uart_cmsdk_apb_irq_err_disable(const struct device * dev)390 static void uart_cmsdk_apb_irq_err_disable(const struct device *dev)
391 {
392 ARG_UNUSED(dev);
393 }
394
395 /**
396 * @brief Verify if Tx or Rx interrupt is pending
397 *
398 * @param dev UART device struct
399 *
400 * @return 1 if Tx or Rx interrupt is pending, 0 otherwise
401 */
uart_cmsdk_apb_irq_is_pending(const struct device * dev)402 static int uart_cmsdk_apb_irq_is_pending(const struct device *dev)
403 {
404 const struct uart_cmsdk_apb_config *dev_cfg = dev->config;
405
406 return (dev_cfg->uart->intstatus & (UART_RX_IN | UART_TX_IN));
407 }
408
409 /**
410 * @brief Update the interrupt status
411 *
412 * @param dev UART device struct
413 *
414 * @return always 1
415 */
uart_cmsdk_apb_irq_update(const struct device * dev)416 static int uart_cmsdk_apb_irq_update(const struct device *dev)
417 {
418 return 1;
419 }
420
421 /**
422 * @brief Set the callback function pointer for an Interrupt.
423 *
424 * @param dev UART device structure
425 * @param cb Callback function pointer.
426 */
uart_cmsdk_apb_irq_callback_set(const struct device * dev,uart_irq_callback_user_data_t cb,void * cb_data)427 static void uart_cmsdk_apb_irq_callback_set(const struct device *dev,
428 uart_irq_callback_user_data_t cb,
429 void *cb_data)
430 {
431 struct uart_cmsdk_apb_dev_data *data = dev->data;
432
433 data->irq_cb = cb;
434 data->irq_cb_data = cb_data;
435 }
436
437 /**
438 * @brief Interrupt service routine.
439 *
440 * Calls the callback function, if exists.
441 *
442 * @param arg argument to interrupt service routine.
443 */
uart_cmsdk_apb_isr(const struct device * dev)444 void uart_cmsdk_apb_isr(const struct device *dev)
445 {
446 struct uart_cmsdk_apb_dev_data *data = dev->data;
447
448 /* Verify if the callback has been registered */
449 if (data->irq_cb) {
450 data->irq_cb(dev, data->irq_cb_data);
451 }
452 }
453
454 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
455
456
457 static const struct uart_driver_api uart_cmsdk_apb_driver_api = {
458 .poll_in = uart_cmsdk_apb_poll_in,
459 .poll_out = uart_cmsdk_apb_poll_out,
460 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
461 .fifo_fill = uart_cmsdk_apb_fifo_fill,
462 .fifo_read = uart_cmsdk_apb_fifo_read,
463 .irq_tx_enable = uart_cmsdk_apb_irq_tx_enable,
464 .irq_tx_disable = uart_cmsdk_apb_irq_tx_disable,
465 .irq_tx_ready = uart_cmsdk_apb_irq_tx_ready,
466 .irq_rx_enable = uart_cmsdk_apb_irq_rx_enable,
467 .irq_rx_disable = uart_cmsdk_apb_irq_rx_disable,
468 .irq_tx_complete = uart_cmsdk_apb_irq_tx_complete,
469 .irq_rx_ready = uart_cmsdk_apb_irq_rx_ready,
470 .irq_err_enable = uart_cmsdk_apb_irq_err_enable,
471 .irq_err_disable = uart_cmsdk_apb_irq_err_disable,
472 .irq_is_pending = uart_cmsdk_apb_irq_is_pending,
473 .irq_update = uart_cmsdk_apb_irq_update,
474 .irq_callback_set = uart_cmsdk_apb_irq_callback_set,
475 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
476 };
477
478 #if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
479
480 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
481 static void uart_cmsdk_apb_irq_config_func_0(const struct device *dev);
482 #endif
483
484 static const struct uart_cmsdk_apb_config uart_cmsdk_apb_dev_cfg_0 = {
485 .uart = (volatile struct uart_cmsdk_apb *)DT_INST_REG_ADDR(0),
486 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency),
487 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
488 .irq_config_func = uart_cmsdk_apb_irq_config_func_0,
489 #endif
490 };
491
492 static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_0 = {
493 .baud_rate = DT_INST_PROP(0, current_speed),
494 .uart_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
495 .device = DT_INST_REG_ADDR(0),},
496 .uart_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
497 .device = DT_INST_REG_ADDR(0),},
498 .uart_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
499 .device = DT_INST_REG_ADDR(0),},
500 };
501
502 DEVICE_DT_INST_DEFINE(0,
503 &uart_cmsdk_apb_init,
504 NULL,
505 &uart_cmsdk_apb_dev_data_0,
506 &uart_cmsdk_apb_dev_cfg_0, PRE_KERNEL_1,
507 CONFIG_SERIAL_INIT_PRIORITY,
508 &uart_cmsdk_apb_driver_api);
509
510 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
511 #if DT_NUM_IRQS(DT_DRV_INST(0)) == 1
uart_cmsdk_apb_irq_config_func_0(const struct device * dev)512 static void uart_cmsdk_apb_irq_config_func_0(const struct device *dev)
513 {
514 IRQ_CONNECT(DT_INST_IRQN(0),
515 DT_INST_IRQ(0, priority),
516 uart_cmsdk_apb_isr,
517 DEVICE_DT_INST_GET(0),
518 0);
519 irq_enable(DT_INST_IRQN(0));
520 }
521 #else
uart_cmsdk_apb_irq_config_func_0(const struct device * dev)522 static void uart_cmsdk_apb_irq_config_func_0(const struct device *dev)
523 {
524 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, tx, irq),
525 DT_INST_IRQ_BY_NAME(0, tx, priority),
526 uart_cmsdk_apb_isr,
527 DEVICE_DT_INST_GET(0),
528 0);
529 irq_enable(DT_INST_IRQ_BY_NAME(0, tx, irq));
530
531 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, rx, irq),
532 DT_INST_IRQ_BY_NAME(0, rx, priority),
533 uart_cmsdk_apb_isr,
534 DEVICE_DT_INST_GET(0),
535 0);
536 irq_enable(DT_INST_IRQ_BY_NAME(0, rx, irq));
537 }
538 #endif
539 #endif
540
541 #endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay) */
542
543 #if DT_NODE_HAS_STATUS(DT_DRV_INST(1), okay)
544
545 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
546 static void uart_cmsdk_apb_irq_config_func_1(const struct device *dev);
547 #endif
548
549 static const struct uart_cmsdk_apb_config uart_cmsdk_apb_dev_cfg_1 = {
550 .uart = (volatile struct uart_cmsdk_apb *)DT_INST_REG_ADDR(1),
551 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(1, clocks, clock_frequency),
552 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
553 .irq_config_func = uart_cmsdk_apb_irq_config_func_1,
554 #endif
555 };
556
557 static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_1 = {
558 .baud_rate = DT_INST_PROP(1, current_speed),
559 .uart_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
560 .device = DT_INST_REG_ADDR(1),},
561 .uart_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
562 .device = DT_INST_REG_ADDR(1),},
563 .uart_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
564 .device = DT_INST_REG_ADDR(1),},
565 };
566
567 DEVICE_DT_INST_DEFINE(1,
568 &uart_cmsdk_apb_init,
569 NULL,
570 &uart_cmsdk_apb_dev_data_1,
571 &uart_cmsdk_apb_dev_cfg_1, PRE_KERNEL_1,
572 CONFIG_SERIAL_INIT_PRIORITY,
573 &uart_cmsdk_apb_driver_api);
574
575 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
576 #if DT_NUM_IRQS(DT_DRV_INST(1)) == 1
uart_cmsdk_apb_irq_config_func_1(const struct device * dev)577 static void uart_cmsdk_apb_irq_config_func_1(const struct device *dev)
578 {
579 IRQ_CONNECT(DT_INST_IRQN(1),
580 DT_INST_IRQ(1, priority),
581 uart_cmsdk_apb_isr,
582 DEVICE_DT_INST_GET(1),
583 0);
584 irq_enable(DT_INST_IRQN(1));
585 }
586 #else
uart_cmsdk_apb_irq_config_func_1(const struct device * dev)587 static void uart_cmsdk_apb_irq_config_func_1(const struct device *dev)
588 {
589 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, tx, irq),
590 DT_INST_IRQ_BY_NAME(1, tx, priority),
591 uart_cmsdk_apb_isr,
592 DEVICE_DT_INST_GET(1),
593 0);
594 irq_enable(DT_INST_IRQ_BY_NAME(1, tx, irq));
595
596 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, rx, irq),
597 DT_INST_IRQ_BY_NAME(1, rx, priority),
598 uart_cmsdk_apb_isr,
599 DEVICE_DT_INST_GET(1),
600 0);
601 irq_enable(DT_INST_IRQ_BY_NAME(1, rx, irq));
602 }
603 #endif
604 #endif
605
606 #endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(1), okay) */
607
608 #if DT_NODE_HAS_STATUS(DT_DRV_INST(2), okay)
609
610 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
611 static void uart_cmsdk_apb_irq_config_func_2(const struct device *dev);
612 #endif
613
614 static const struct uart_cmsdk_apb_config uart_cmsdk_apb_dev_cfg_2 = {
615 .uart = (volatile struct uart_cmsdk_apb *)DT_INST_REG_ADDR(2),
616 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(2, clocks, clock_frequency),
617 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
618 .irq_config_func = uart_cmsdk_apb_irq_config_func_2,
619 #endif
620 };
621
622 static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_2 = {
623 .baud_rate = DT_INST_PROP(2, current_speed),
624 .uart_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
625 .device = DT_INST_REG_ADDR(2),},
626 .uart_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
627 .device = DT_INST_REG_ADDR(2),},
628 .uart_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
629 .device = DT_INST_REG_ADDR(2),},
630 };
631
632 DEVICE_DT_INST_DEFINE(2,
633 &uart_cmsdk_apb_init,
634 NULL,
635 &uart_cmsdk_apb_dev_data_2,
636 &uart_cmsdk_apb_dev_cfg_2, PRE_KERNEL_1,
637 CONFIG_SERIAL_INIT_PRIORITY,
638 &uart_cmsdk_apb_driver_api);
639
640 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
641 #if DT_NUM_IRQS(DT_DRV_INST(2)) == 1
uart_cmsdk_apb_irq_config_func_2(const struct device * dev)642 static void uart_cmsdk_apb_irq_config_func_2(const struct device *dev)
643 {
644 IRQ_CONNECT(DT_INST_IRQN(2),
645 DT_INST_IRQ_BY_NAME(2, priority, irq),
646 uart_cmsdk_apb_isr,
647 DEVICE_DT_INST_GET(2),
648 0);
649 irq_enable(DT_INST_IRQN(2));
650 }
651 #else
uart_cmsdk_apb_irq_config_func_2(const struct device * dev)652 static void uart_cmsdk_apb_irq_config_func_2(const struct device *dev)
653 {
654 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(2, tx, irq),
655 DT_INST_IRQ_BY_NAME(2, tx, priority),
656 uart_cmsdk_apb_isr,
657 DEVICE_DT_INST_GET(2),
658 0);
659 irq_enable(DT_INST_IRQ_BY_NAME(2, tx, irq));
660
661 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(2, rx, irq),
662 DT_INST_IRQ_BY_NAME(2, rx, priority),
663 uart_cmsdk_apb_isr,
664 DEVICE_DT_INST_GET(2),
665 0);
666 irq_enable(DT_INST_IRQ_BY_NAME(2, rx, irq));
667 }
668 #endif
669 #endif
670
671 #endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(2), okay) */
672
673 #if DT_NODE_HAS_STATUS(DT_DRV_INST(3), okay)
674
675 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
676 static void uart_cmsdk_apb_irq_config_func_3(const struct device *dev);
677 #endif
678
679 static const struct uart_cmsdk_apb_config uart_cmsdk_apb_dev_cfg_3 = {
680 .uart = (volatile struct uart_cmsdk_apb *)DT_INST_REG_ADDR(3),
681 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(3, clocks, clock_frequency),
682 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
683 .irq_config_func = uart_cmsdk_apb_irq_config_func_3,
684 #endif
685 };
686
687 static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_3 = {
688 .baud_rate = DT_INST_PROP(3, current_speed),
689 .uart_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
690 .device = DT_INST_REG_ADDR(3),},
691 .uart_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
692 .device = DT_INST_REG_ADDR(3),},
693 .uart_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
694 .device = DT_INST_REG_ADDR(3),},
695 };
696
697 DEVICE_DT_INST_DEFINE(3,
698 &uart_cmsdk_apb_init,
699 NULL,
700 &uart_cmsdk_apb_dev_data_3,
701 &uart_cmsdk_apb_dev_cfg_3, PRE_KERNEL_1,
702 CONFIG_SERIAL_INIT_PRIORITY,
703 &uart_cmsdk_apb_driver_api);
704
705 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
706 #if DT_NUM_IRQS(DT_DRV_INST(3)) == 1
uart_cmsdk_apb_irq_config_func_3(const struct device * dev)707 static void uart_cmsdk_apb_irq_config_func_3(const struct device *dev)
708 {
709 IRQ_CONNECT(DT_INST_IRQN(3),
710 DT_INST_IRQ(3, priority),
711 uart_cmsdk_apb_isr,
712 DEVICE_DT_INST_GET(3),
713 0);
714 irq_enable(DT_INST_IRQN(3));
715 }
716 #else
uart_cmsdk_apb_irq_config_func_3(const struct device * dev)717 static void uart_cmsdk_apb_irq_config_func_3(const struct device *dev)
718 {
719 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(3, tx, irq),
720 DT_INST_IRQ_BY_NAME(3, tx, priority),
721 uart_cmsdk_apb_isr,
722 DEVICE_DT_INST_GET(3),
723 0);
724 irq_enable(DT_INST_IRQ_BY_NAME(3, tx, irq));
725
726 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(3, rx, irq),
727 DT_INST_IRQ_BY_NAME(3, rx, priority),
728 uart_cmsdk_apb_isr,
729 DEVICE_DT_INST_GET(3),
730 0);
731 irq_enable(DT_INST_IRQ_BY_NAME(3, rx, irq));
732 }
733 #endif
734 #endif
735
736 #endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(3), okay) */
737
738 #if DT_NODE_HAS_STATUS(DT_DRV_INST(4), okay)
739
740 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
741 static void uart_cmsdk_apb_irq_config_func_4(const struct device *dev);
742 #endif
743
744 static const struct uart_cmsdk_apb_config uart_cmsdk_apb_dev_cfg_4 = {
745 .uart = (volatile struct uart_cmsdk_apb *)DT_INST_REG_ADDR(4),
746 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(4, clocks, clock_frequency),
747 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
748 .irq_config_func = uart_cmsdk_apb_irq_config_func_4,
749 #endif
750 };
751
752 static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_4 = {
753 .baud_rate = DT_INST_PROP(4, current_speed),
754 .uart_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
755 .device = DT_INST_REG_ADDR(4),},
756 .uart_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
757 .device = DT_INST_REG_ADDR(4),},
758 .uart_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
759 .device = DT_INST_REG_ADDR(4),},
760 };
761
762 DEVICE_DT_INST_DEFINE(4,
763 &uart_cmsdk_apb_init,
764 NULL,
765 &uart_cmsdk_apb_dev_data_4,
766 &uart_cmsdk_apb_dev_cfg_4, PRE_KERNEL_1,
767 CONFIG_SERIAL_INIT_PRIORITY,
768 &uart_cmsdk_apb_driver_api);
769
770 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
771 #if DT_NUM_IRQS(DT_DRV_INST(4)) == 1
uart_cmsdk_apb_irq_config_func_4(const struct device * dev)772 static void uart_cmsdk_apb_irq_config_func_4(const struct device *dev)
773 {
774 IRQ_CONNECT(DT_INST_IRQN(4),
775 DT_INST_IRQ_BY_NAME(4, priority, irq),
776 uart_cmsdk_apb_isr,
777 DEVICE_DT_INST_GET(4),
778 0);
779 irq_enable(DT_INST_IRQN(4));
780 }
781 #else
uart_cmsdk_apb_irq_config_func_4(const struct device * dev)782 static void uart_cmsdk_apb_irq_config_func_4(const struct device *dev)
783 {
784 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(4, tx, irq),
785 DT_INST_IRQ_BY_NAME(4, tx, priority),
786 uart_cmsdk_apb_isr,
787 DEVICE_DT_INST_GET(4),
788 0);
789 irq_enable(DT_INST_IRQ_BY_NAME(4, tx, irq));
790
791 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(4, rx, irq),
792 DT_INST_IRQ_BY_NAME(4, rx, priority),
793 uart_cmsdk_apb_isr,
794 DEVICE_DT_INST_GET(4),
795 0);
796 irq_enable(DT_INST_IRQ_BY_NAME(4, rx, irq));
797 }
798 #endif
799 #endif
800
801 #endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(4), okay) */
802
