1 /*
2 * Copyright (c) 2019 Antmicro <www.antmicro.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT litex_pwm
8
9 #include <zephyr/device.h>
10 #include <zephyr/drivers/pwm.h>
11 #include <zephyr/types.h>
12
13 #include <soc.h>
14
15 #define REG_EN_ENABLE 0x1
16 #define REG_EN_DISABLE 0x0
17
18 /* PWM device in LiteX has only one channel */
19 #define NUMBER_OF_CHANNELS 1
20
21 struct pwm_litex_cfg {
22 uint32_t reg_en;
23 uint32_t reg_width;
24 uint32_t reg_period;
25 };
26
pwm_litex_init(const struct device * dev)27 int pwm_litex_init(const struct device *dev)
28 {
29 const struct pwm_litex_cfg *cfg = dev->config;
30
31 litex_write8(REG_EN_ENABLE, cfg->reg_en);
32 return 0;
33 }
34
pwm_litex_set_cycles(const struct device * dev,uint32_t channel,uint32_t period_cycles,uint32_t pulse_cycles,pwm_flags_t flags)35 int pwm_litex_set_cycles(const struct device *dev, uint32_t channel,
36 uint32_t period_cycles,
37 uint32_t pulse_cycles, pwm_flags_t flags)
38 {
39 const struct pwm_litex_cfg *cfg = dev->config;
40
41 if (channel >= NUMBER_OF_CHANNELS) {
42 return -EINVAL;
43 }
44
45 litex_write8(REG_EN_DISABLE, cfg->reg_en);
46 litex_write32(pulse_cycles, cfg->reg_width);
47 litex_write32(period_cycles, cfg->reg_period);
48 litex_write8(REG_EN_ENABLE, cfg->reg_en);
49
50 return 0;
51 }
52
pwm_litex_get_cycles_per_sec(const struct device * dev,uint32_t channel,uint64_t * cycles)53 int pwm_litex_get_cycles_per_sec(const struct device *dev, uint32_t channel,
54 uint64_t *cycles)
55 {
56 if (channel >= NUMBER_OF_CHANNELS) {
57 return -EINVAL;
58 }
59
60 *cycles = sys_clock_hw_cycles_per_sec();
61 return 0;
62 }
63
64 static const struct pwm_driver_api pwm_litex_driver_api = {
65 .set_cycles = pwm_litex_set_cycles,
66 .get_cycles_per_sec = pwm_litex_get_cycles_per_sec,
67 };
68
69 /* Device Instantiation */
70
71 #define PWM_LITEX_INIT(n) \
72 static const struct pwm_litex_cfg pwm_litex_cfg_##n = { \
73 .reg_en = DT_INST_REG_ADDR_BY_NAME(n, enable), \
74 .reg_width = DT_INST_REG_ADDR_BY_NAME(n, width), \
75 .reg_period = DT_INST_REG_ADDR_BY_NAME(n, period), \
76 }; \
77 \
78 DEVICE_DT_INST_DEFINE(n, \
79 pwm_litex_init, \
80 NULL, \
81 NULL, \
82 &pwm_litex_cfg_##n, \
83 POST_KERNEL, \
84 CONFIG_PWM_LITEX_INIT_PRIORITY, \
85 &pwm_litex_driver_api \
86 );
87
88 DT_INST_FOREACH_STATUS_OKAY(PWM_LITEX_INIT)
89
