1 /*
2 * Copyright (c) 2021 IP-Logix Inc.
3 * Copyright 2023 NXP
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #include <zephyr/shell/shell.h>
9 #include <stdlib.h>
10 #include <zephyr/drivers/mdio.h>
11 #include <string.h>
12 #include <zephyr/sys/util.h>
13 #include <zephyr/devicetree.h>
14
15 #include <zephyr/logging/log.h>
16 LOG_MODULE_REGISTER(mdio_shell, CONFIG_LOG_DEFAULT_LEVEL);
17
18 #if DT_HAS_COMPAT_STATUS_OKAY(atmel_sam_mdio)
19 #define DT_DRV_COMPAT atmel_sam_mdio
20 #elif DT_HAS_COMPAT_STATUS_OKAY(espressif_esp32_mdio)
21 #define DT_DRV_COMPAT espressif_esp32_mdio
22 #elif DT_HAS_COMPAT_STATUS_OKAY(nxp_s32_netc_emdio)
23 #define DT_DRV_COMPAT nxp_s32_netc_emdio
24 #elif DT_HAS_COMPAT_STATUS_OKAY(nxp_s32_gmac_mdio)
25 #define DT_DRV_COMPAT nxp_s32_gmac_mdio
26 #elif DT_HAS_COMPAT_STATUS_OKAY(adi_adin2111_mdio)
27 #define DT_DRV_COMPAT adi_adin2111_mdio
28 #elif DT_HAS_COMPAT_STATUS_OKAY(smsc_lan91c111_mdio)
29 #define DT_DRV_COMPAT smsc_lan91c111_mdio
30 #elif DT_HAS_COMPAT_STATUS_OKAY(zephyr_mdio_gpio)
31 #define DT_DRV_COMPAT zephyr_mdio_gpio
32 #elif DT_HAS_COMPAT_STATUS_OKAY(nxp_enet_mdio)
33 #define DT_DRV_COMPAT nxp_enet_mdio
34 #elif DT_HAS_COMPAT_STATUS_OKAY(infineon_xmc4xxx_mdio)
35 #define DT_DRV_COMPAT infineon_xmc4xxx_mdio
36 #else
37 #error "No known devicetree compatible match for MDIO shell"
38 #endif
39
40 #define MDIO_NODE_ID DT_COMPAT_GET_ANY_STATUS_OKAY(DT_DRV_COMPAT)
41
42 /*
43 * Scan the entire 5-bit address space of the MDIO bus
44 *
45 * scan [<reg_addr>]
46 */
cmd_mdio_scan(const struct shell * sh,size_t argc,char ** argv)47 static int cmd_mdio_scan(const struct shell *sh, size_t argc, char **argv)
48 {
49 const struct device *dev;
50 int cnt;
51 uint16_t data;
52 uint16_t reg_addr;
53
54 dev = DEVICE_DT_GET(MDIO_NODE_ID);
55 if (!device_is_ready(dev)) {
56 shell_error(sh, "MDIO: Device driver %s is not ready.", dev->name);
57
58 return -ENODEV;
59 }
60
61 if (argc >= 2) {
62 reg_addr = strtol(argv[1], NULL, 16);
63 } else {
64 reg_addr = 0;
65 }
66
67 shell_print(sh,
68 "Scanning bus for devices. Reading register 0x%x",
69 reg_addr);
70 cnt = 0;
71
72 mdio_bus_enable(dev);
73
74 for (int i = 0; i < 32; i++) {
75 data = 0;
76 if (mdio_read(dev, i, reg_addr, &data) >= 0 &&
77 data != UINT16_MAX) {
78 cnt++;
79 shell_print(sh, "Found MDIO device @ 0x%x", i);
80 }
81 }
82
83 mdio_bus_disable(dev);
84
85 shell_print(sh, "%u devices found on %s", cnt, dev->name);
86
87 return 0;
88 }
89
90 /* mdio write <port_addr> <reg_addr> <data> */
cmd_mdio_write(const struct shell * sh,size_t argc,char ** argv)91 static int cmd_mdio_write(const struct shell *sh, size_t argc, char **argv)
92 {
93 const struct device *dev;
94 uint16_t data;
95 uint16_t reg_addr;
96 uint16_t port_addr;
97
98 dev = DEVICE_DT_GET(MDIO_NODE_ID);
99 if (!device_is_ready(dev)) {
100 shell_error(sh, "MDIO: Device driver %s is not ready.", dev->name);
101
102 return -ENODEV;
103 }
104
105 port_addr = strtol(argv[1], NULL, 16);
106 reg_addr = strtol(argv[2], NULL, 16);
107 data = strtol(argv[3], NULL, 16);
108
109 mdio_bus_enable(dev);
110
111 if (mdio_write(dev, port_addr, reg_addr, data) < 0) {
112 shell_error(sh, "Failed to write to device: %s", dev->name);
113 mdio_bus_disable(dev);
114
115 return -EIO;
116 }
117
118 mdio_bus_disable(dev);
119
120 return 0;
121 }
122
123 /* mdio read <port_addr> <reg_addr> */
cmd_mdio_read(const struct shell * sh,size_t argc,char ** argv)124 static int cmd_mdio_read(const struct shell *sh, size_t argc, char **argv)
125 {
126 const struct device *dev;
127 uint16_t data;
128 uint16_t reg_addr;
129 uint16_t port_addr;
130
131 dev = DEVICE_DT_GET(MDIO_NODE_ID);
132 if (!device_is_ready(dev)) {
133 shell_error(sh, "MDIO: Device driver %s is not ready.", dev->name);
134
135 return -ENODEV;
136 }
137
138 port_addr = strtol(argv[1], NULL, 16);
139 reg_addr = strtol(argv[2], NULL, 16);
140
141 mdio_bus_enable(dev);
142
143 if (mdio_read(dev, port_addr, reg_addr, &data) < 0) {
144 shell_error(sh, "Failed to read from device: %s", dev->name);
145 mdio_bus_disable(dev);
146
147 return -EIO;
148 }
149
150 mdio_bus_disable(dev);
151
152 shell_print(sh, "%x[%x]: 0x%x", port_addr, reg_addr, data);
153
154 return 0;
155 }
156
157 /* mdio write_c45 <port_addr> <dev_addr> <reg_addr> <value> */
cmd_mdio_write_45(const struct shell * sh,size_t argc,char ** argv)158 static int cmd_mdio_write_45(const struct shell *sh, size_t argc, char **argv)
159 {
160 const struct device *dev;
161 uint16_t data;
162 uint16_t reg_addr;
163 uint8_t dev_addr;
164 uint8_t port_addr;
165
166 dev = DEVICE_DT_GET(MDIO_NODE_ID);
167 if (!device_is_ready(dev)) {
168 shell_error(sh, "MDIO: Device driver %s is not ready.", dev->name);
169
170 return -ENODEV;
171 }
172
173 port_addr = strtol(argv[1], NULL, 16);
174 dev_addr = strtol(argv[2], NULL, 16);
175 reg_addr = strtol(argv[3], NULL, 16);
176 data = strtol(argv[4], NULL, 16);
177
178 mdio_bus_enable(dev);
179
180 if (mdio_write_c45(dev, port_addr, dev_addr, reg_addr, data) < 0) {
181 shell_error(sh, "Failed to write to device: %s", dev->name);
182 mdio_bus_disable(dev);
183
184 return -EIO;
185 }
186
187 mdio_bus_disable(dev);
188
189 return 0;
190 }
191
192 /* mdio read_c45 <port_addr> <dev_addr> <reg_addr> */
cmd_mdio_read_c45(const struct shell * sh,size_t argc,char ** argv)193 static int cmd_mdio_read_c45(const struct shell *sh, size_t argc, char **argv)
194 {
195 const struct device *dev;
196 uint16_t data;
197 uint16_t reg_addr;
198 uint8_t dev_addr;
199 uint8_t port_addr;
200
201 dev = DEVICE_DT_GET(MDIO_NODE_ID);
202 if (!device_is_ready(dev)) {
203 shell_error(sh, "MDIO: Device driver %s is not ready.", dev->name);
204
205 return -ENODEV;
206 }
207
208 port_addr = strtol(argv[1], NULL, 16);
209 dev_addr = strtol(argv[2], NULL, 16);
210 reg_addr = strtol(argv[3], NULL, 16);
211
212 mdio_bus_enable(dev);
213
214 if (mdio_read_c45(dev, port_addr, dev_addr, reg_addr, &data) < 0) {
215 shell_error(sh, "Failed to read from device: %s", dev->name);
216 mdio_bus_disable(dev);
217
218 return -EIO;
219 }
220
221 mdio_bus_disable(dev);
222
223 shell_print(sh, "%x[%x:%x]: 0x%x", port_addr, dev_addr, reg_addr, data);
224
225 return 0;
226 }
227
228 SHELL_STATIC_SUBCMD_SET_CREATE(sub_mdio_cmds,
229 SHELL_CMD_ARG(scan, NULL,
230 "Scan MDIO bus for devices: scan [<reg_addr>]",
231 cmd_mdio_scan, 0, 1),
232 SHELL_CMD_ARG(read, NULL,
233 "Read from MDIO device: read <phy_addr> <reg_addr>",
234 cmd_mdio_read, 3, 0),
235 SHELL_CMD_ARG(write, NULL,
236 "Write to MDIO device: write <phy_addr> <reg_addr> <value>",
237 cmd_mdio_write, 4, 0),
238 SHELL_CMD_ARG(read_c45, NULL,
239 "Read from MDIO Clause 45 device: "
240 "read_c45 <port_addr> <dev_addr> <reg_addr>",
241 cmd_mdio_read_c45, 4, 0),
242 SHELL_CMD_ARG(write_c45, NULL,
243 "Write to MDIO Clause 45 device: "
244 "write_c45 <port_addr> <dev_addr> <reg_addr> <value>",
245 cmd_mdio_write_45, 5, 0),
246 SHELL_SUBCMD_SET_END /* Array terminated. */
247 );
248
249 SHELL_CMD_REGISTER(mdio, &sub_mdio_cmds, "MDIO commands", NULL);
250
