1# Copyright (c) 2022 Intel Corporation.
2# SPDX-License-Identifier: Apache-2.0
3
4config FLASH_CAD_QSPI_NOR
5	bool "Cadence Quad SPI Flash driver"
6	default y
7	depends on DT_HAS_CDNS_QSPI_NOR_ENABLED
8	select FLASH_HAS_PAGE_LAYOUT
9	select FLASH_HAS_DRIVER_ENABLED
10	help
11	  Enable Cadence QSPI-NOR support.
12
13if FLASH_CAD_QSPI_NOR
14
15config CAD_QSPI_MICRON_N25Q_SUPPORT
16	bool "Cadence Quad SPI Micron N25Q Support"
17	default y
18	help
19	  Enable Micron N25Q Support.
20
21config CAD_QSPI_NOR_SUBSECTOR_SIZE
22	hex "Cadence Quad SPI subsector size"
23	default 0x1000
24	help
25	  Set the Cadence Quad SPI subsector size.
26
27config QSPI_ADDR_BYTES
28	int "Access QSPI address memory size in bytes"
29	default 2
30	help
31	  Set the address memory size in bytes when
32	  accessing QSPI.
33
34config QSPI_BYTES_PER_DEV
35	int "Set QSPI to read / write how many bytes per device"
36	default 256
37	help
38	  Set the size for a QSPI to read / write per device.
39
40config QSPI_BYTES_PER_BLOCK
41	int "Set QSPI to read / write how many bytes per block"
42	default 16
43	help
44	  Set the size for a QSPI to read / write per block.
45
46endif # FLASH_CAD_QSPI_NOR
47