1# Copyright (c) 2020 Intel Corporation 2# SPDX-License-Identifier: Apache-2.0 3 4if BOARD_INTEL_EHL_CRB || BOARD_INTEL_EHL_CRB_SBL 5 6config BOARD 7 default "intel_ehl_crb_sbl" if BOARD_INTEL_EHL_CRB_SBL 8 default "intel_ehl_crb" 9 10config BUILD_OUTPUT_STRIPPED 11 default y 12 13config MP_MAX_NUM_CPUS 14 default 2 15 16if BOARD_INTEL_EHL_CRB_SBL 17config SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN 18 depends on SHELL_BACKEND_SERIAL 19 default n 20endif 21 22config HEAP_MEM_POOL_ADD_SIZE_ACPI 23 default 2097152 24 depends on ACPI 25 26# TSC on this board is 1.9 GHz, HPET and APIC are 19.2 MHz 27config SYS_CLOCK_HW_CYCLES_PER_SEC 28 default 1900000000 if APIC_TSC_DEADLINE_TIMER 29 default 1900000000 if APIC_TIMER_TSC 30 default 19200000 31 32if APIC_TIMER 33config APIC_TIMER_IRQ 34 default 24 35config APIC_TIMER_TSC_M 36 default 3 37config APIC_TIMER_TSC_N 38 default 249 39endif 40 41endif # BOARD_INTEL_EHL_CRB || BOARD_INTEL_EHL_CRB_SBL 42
