1.. _qemu_cortex_m3:
2
3ARM Cortex-M3 Emulation (QEMU)
4##############################
5
6Overview
7********
8
9This board configuration will use QEMU to emulate the TI LM3S6965 platform.
10
11This configuration provides support for an ARM Cortex-M3 CPU and these devices:
12
13* Nested Vectored Interrupt Controller
14* System Tick System Clock
15* Stellaris UART
16
17.. note::
18   This board configuration makes no claims about its suitability for use
19   with an actual ti_lm3s6965 hardware system, or any other hardware system.
20
21Hardware
22********
23Supported Features
24==================
25
26The following hardware features are supported:
27
28+--------------+------------+----------------------+
29| Interface    | Controller | Driver/Component     |
30+==============+============+======================+
31| NVIC         | on-chip    | nested vectored      |
32|              |            | interrupt controller |
33+--------------+------------+----------------------+
34| Stellaris    | on-chip    | serial port          |
35| UART         |            |                      |
36+--------------+------------+----------------------+
37| SYSTICK      | on-chip    | system clock         |
38+--------------+------------+----------------------+
39
40The kernel currently does not support other hardware features on this platform.
41
42Devices
43========
44System Clock
45------------
46
47This board configuration uses a system clock frequency of 12 MHz.
48
49Serial Port
50-----------
51
52This board configuration uses a single serial communication channel with the
53CPU's UART0.
54
55If SLIP networking is enabled (see below), an additional serial port will be
56used for it.
57
58Known Problems or Limitations
59==============================
60
61The following platform features are unsupported:
62
63* Memory protection through optional MPU.  However, using a XIP kernel
64  effectively provides TEXT/RODATA write protection in ROM.
65* SRAM at addresses 0x1FFF0000-0x1FFFFFFF
66* Writing to the hardware's flash memory
67
68
69Programming and Debugging
70*************************
71
72Use this configuration to run basic Zephyr applications and kernel tests in the QEMU
73emulated environment, for example, with the :zephyr:code-sample:`synchronization` sample:
74
75.. zephyr-app-commands::
76   :zephyr-app: samples/synchronization
77   :host-os: unix
78   :board: qemu_cortex_m3
79   :goals: run
80
81This will build an image with the synchronization sample app, boot it using
82QEMU, and display the following console output:
83
84.. code-block:: console
85
86        ***** BOOTING ZEPHYR OS v1.8.99 - BUILD: Jun 27 2017 13:09:26 *****
87        threadA: Hello World from arm!
88        threadB: Hello World from arm!
89        threadA: Hello World from arm!
90        threadB: Hello World from arm!
91        threadA: Hello World from arm!
92        threadB: Hello World from arm!
93        threadA: Hello World from arm!
94        threadB: Hello World from arm!
95        threadA: Hello World from arm!
96        threadB: Hello World from arm!
97
98Exit QEMU by pressing :kbd:`CTRL+A` :kbd:`x`.
99
100Debugging
101=========
102
103Refer to the detailed overview about :ref:`application_debugging`.
104
105Networking
106==========
107
108The board supports SLIP networking over an emulated serial port
109(``CONFIG_NET_SLIP_TAP=y``). The detailed setup is described in
110:ref:`networking_with_qemu`.
111
112It is also possible to use the QEMU built-in Ethernet adapter to connect
113to the host system. This is faster than using SLIP and is also the preferred
114way. See :ref:`networking_with_eth_qemu` for details.
115
116References
117**********
118
1191. The Definitive Guide to the ARM Cortex-M3, Second Edition by Joseph Yiu (ISBN
120   978-0-12-382090-7)
1212. ARMv7-M Architecture Technical Reference Manual (ARM DDI 0403D ID021310)
1223. Procedure Call Standard for the ARM Architecture (ARM IHI 0042E, current
123   through ABI release 2.09, 2012/11/30)
1244. Cortex-M3 Revision r2p1 Technical Reference Manual (ARM DDI 0337I ID072410)
1255. Cortex-M3 Devices Generic User Guide (ARM DUI 0052A ID121610)
126