1/* SPDX-License-Identifier: Apache-2.0 */ 2 3/dts-v1/; 4 5#include <arm/armv7-m.dtsi> 6#include <zephyr/dt-bindings/i2c/i2c.h> 7#include <zephyr/dt-bindings/input/input-event-codes.h> 8 9/ { 10 compatible = "arm,mps2"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 14 aliases { 15 led0 = &led_0; 16 led1 = &led_1; 17 sw0 = &user_button_0; 18 sw1 = &user_button_1; 19 watchdog0 = &wdog0; 20 }; 21 22 chosen { 23 zephyr,console = &uart0; 24 zephyr,shell-uart = &uart0; 25 zephyr,uart-pipe = &uart1; 26 zephyr,sram = &sram0; 27 zephyr,flash = &flash0; 28 }; 29 30 leds { 31 compatible = "gpio-leds"; 32 led_0: led_0 { 33 gpios = <&gpio_led0 0>; 34 label = "USERLED0"; 35 }; 36 led_1: led_1 { 37 gpios = <&gpio_led0 1>; 38 label = "USERLED1"; 39 }; 40 }; 41 42 gpio_keys { 43 compatible = "gpio-keys"; 44 user_button_0: button_0 { 45 label = "USERPB0"; 46 gpios = <&gpio_button 0>; 47 zephyr,code = <INPUT_KEY_0>; 48 }; 49 user_button_1: button_1 { 50 label = "USERPB1"; 51 gpios = <&gpio_button 1>; 52 zephyr,code = <INPUT_KEY_1>; 53 }; 54 }; 55 56 cpus { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 60 cpu@0 { 61 compatible = "arm,cortex-m3"; 62 reg = <0>; 63 }; 64 }; 65 66 sram0: memory@20000000 { 67 compatible = "mmio-sram"; 68 reg = <0x20000000 0x400000>; 69 }; 70 71 flash0: flash@0 { 72 compatible = "soc-nv-flash"; 73 reg = <0 0x400000>; 74 }; 75 76 sysclk: system-clock { 77 compatible = "fixed-clock"; 78 clock-frequency = <25000000>; 79 #clock-cells = <0>; 80 }; 81 82 soc { 83 timer0: timer@40000000 { 84 compatible = "arm,cmsdk-timer"; 85 reg = <0x40000000 0x1000>; 86 interrupts = <8 3>; 87 }; 88 89 timer1: timer@40001000 { 90 compatible = "arm,cmsdk-timer"; 91 reg = <0x40001000 0x1000>; 92 interrupts = <9 3>; 93 }; 94 95 dtimer0: dtimer@40002000 { 96 compatible = "arm,cmsdk-dtimer"; 97 reg = <0x40002000 0x1000>; 98 interrupts = <10 3>; 99 }; 100 101 uart0: uart@40004000 { 102 compatible = "arm,cmsdk-uart"; 103 reg = <0x40004000 0x1000>; 104 interrupts = <1 3 0 3>; 105 interrupt-names = "tx", "rx"; 106 clocks = <&sysclk>; 107 current-speed = <115200>; 108 }; 109 110 uart1: uart@40005000 { 111 compatible = "arm,cmsdk-uart"; 112 reg = <0x40005000 0x1000>; 113 interrupts = <3 3 2 3>; 114 interrupt-names = "tx", "rx"; 115 clocks = <&sysclk>; 116 current-speed = <115200>; 117 }; 118 119 uart2: uart@40006000 { 120 compatible = "arm,cmsdk-uart"; 121 reg = <0x40006000 0x1000>; 122 interrupts = <5 3 4 3>; 123 interrupt-names = "tx", "rx"; 124 clocks = <&sysclk>; 125 current-speed = <115200>; 126 }; 127 128 uart3: uart@40007000 { 129 compatible = "arm,cmsdk-uart"; 130 reg = <0x40007000 0x1000>; 131 interrupts = <19 3 18 3>; 132 interrupt-names = "tx", "rx"; 133 clocks = <&sysclk>; 134 current-speed = <115200>; 135 }; 136 137 wdog0: wdog@40008000 { 138 compatible = "arm,cmsdk-watchdog"; 139 clocks = <&sysclk>; 140 reg = <0x40008000 0x1000>; 141 }; 142 143 uart4: uart@40009000 { 144 compatible = "arm,cmsdk-uart"; 145 reg = <0x40009000 0x1000>; 146 interrupts = <21 3 20 3>; 147 interrupt-names = "tx", "rx"; 148 clocks = <&sysclk>; 149 current-speed = <115200>; 150 }; 151 152 gpio0: gpio@40010000 { 153 compatible = "arm,cmsdk-gpio"; 154 reg = <0x40010000 0x1000>; 155 interrupts = <6 3>; 156 gpio-controller; 157 #gpio-cells = <2>; 158 }; 159 160 gpio1: gpio@40011000 { 161 compatible = "arm,cmsdk-gpio"; 162 reg = <0x40011000 0x1000>; 163 interrupts = <7 3>; 164 gpio-controller; 165 #gpio-cells = <2>; 166 }; 167 168 gpio2: gpio@40012000 { 169 compatible = "arm,cmsdk-gpio"; 170 reg = <0x40012000 0x1000>; 171 interrupts = <16 3>; 172 gpio-controller; 173 #gpio-cells = <2>; 174 }; 175 176 gpio3: gpio@40013000 { 177 compatible = "arm,cmsdk-gpio"; 178 reg = <0x40013000 0x1000>; 179 interrupts = <17 3>; 180 gpio-controller; 181 #gpio-cells = <2>; 182 }; 183 184 eth0: eth@40200000 { 185 /* Linux has "smsc,lan9115" */ 186 compatible = "smsc,lan9220"; 187 /* Such a big size from memory map in AN385 */ 188 /* Actual reg range is ~0x200 */ 189 reg = <0x40200000 0x100000>; 190 interrupts = <13 3>; 191 }; 192 193 i2c_touch: i2c@40022000 { 194 compatible = "arm,versatile-i2c"; 195 clock-frequency = <I2C_BITRATE_STANDARD>; 196 #address-cells = <1>; 197 #size-cells = <0>; 198 reg = <0x40022000 0x1000>; 199 }; 200 201 i2c_audio_conf: i2c@40023000 { 202 compatible = "arm,versatile-i2c"; 203 clock-frequency = <I2C_BITRATE_STANDARD>; 204 #address-cells = <1>; 205 #size-cells = <0>; 206 reg = <0x40023000 0x1000>; 207 }; 208 209 i2c_shield0: i2c@40029000 { 210 compatible = "arm,versatile-i2c"; 211 clock-frequency = <I2C_BITRATE_STANDARD>; 212 #address-cells = <1>; 213 #size-cells = <0>; 214 reg = <0x40029000 0x1000>; 215 }; 216 217 i2c_shield1: i2c@4002a000 { 218 compatible = "arm,versatile-i2c"; 219 clock-frequency = <I2C_BITRATE_STANDARD>; 220 #address-cells = <1>; 221 #size-cells = <0>; 222 reg = <0x4002a000 0x1000>; 223 }; 224 225 gpio_led0: mps2_fpgaio@40028000 { 226 compatible = "arm,mps2-fpgaio-gpio"; 227 228 reg = <0x40028000 0x4>; 229 gpio-controller; 230 #gpio-cells = <1>; 231 ngpios = <2>; 232 }; 233 234 gpio_button: mps2_fpgaio@40028008 { 235 compatible = "arm,mps2-fpgaio-gpio"; 236 237 reg = <0x40028008 0x4>; 238 gpio-controller; 239 #gpio-cells = <1>; 240 ngpios = <2>; 241 }; 242 243 gpio_misc: mps2_fpgaio@4002804c { 244 compatible = "arm,mps2-fpgaio-gpio"; 245 246 reg = <0x4002804c 0x4>; 247 gpio-controller; 248 #gpio-cells = <1>; 249 ngpios = <10>; 250 }; 251 252 }; 253}; 254 255&nvic { 256 arm,num-irq-priority-bits = <3>; 257}; 258
