1/*
2 * Copyright 2023 NXP
3 *
4 * Experimental ENET binding overlay
5 */
6
7
8/ {
9	soc {
10		/delete-node/ ethernet@40424000;
11
12		enet: ethernet@40424000 {
13			compatible = "nxp,enet";
14			reg = <0x40424000 0x628>;
15			clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
16			enet_mac: ethernet {
17				compatible = "nxp,enet-mac";
18				interrupts = <137 0>;
19				interrupt-names = "COMMON";
20				nxp,mdio = <&enet_mdio>;
21				nxp,ptp-clock = <&enet_ptp_clock>;
22				status = "disabled";
23			};
24			enet_mdio: mdio {
25				compatible = "nxp,enet-mdio";
26				status = "disabled";
27				#address-cells = <1>;
28				#size-cells = <0>;
29			};
30			enet_ptp_clock: ptp_clock {
31				compatible = "nxp,enet-ptp-clock";
32				interrupts = <138 0>;
33				status = "disabled";
34				clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
35			};
36		};
37	};
38};
39
40&enet_mac {
41	status = "okay";
42	pinctrl-0 = <&pinmux_enet>;
43	pinctrl-names = "default";
44	phy-handle = <&phy>;
45	phy-connection-type = "rmii";
46};
47
48&enet_mdio {
49	status = "okay";
50	pinctrl-0 = <&pinmux_enet_mdio>;
51	pinctrl-names = "default";
52	phy: phy@0 {
53		compatible = "microchip,ksz8081";
54		reg = <0>;
55		status = "okay";
56		mc,reset-gpio = <&gpio12 12 GPIO_ACTIVE_HIGH>;
57		mc,interrupt-gpio = <&gpio9 11 GPIO_ACTIVE_HIGH>;
58		mc,interface-type = "rmii";
59	};
60};
61
62&enet_ptp_clock {
63	status = "okay";
64	pinctrl-0 = <&pinmux_ptp>;
65	pinctrl-names = "default";
66};
67
68
69
70&pinctrl {
71	/delete-node/ pinmux_ptp;
72	/delete-node/ pinmux_enet;
73
74	pinmux_enet: pinmux_enet {
75		group0 {
76			pinmux = <&iomuxc_gpio_ad_12_gpio9_io11>,
77				<&iomuxc_gpio_disp_b2_08_enet_rx_en>,
78				<&iomuxc_gpio_disp_b2_09_enet_rx_er>;
79			drive-strength = "high";
80			bias-pull-down;
81			slew-rate = "fast";
82		};
83		group1 {
84			pinmux = <&iomuxc_gpio_disp_b2_06_enet_rdata00>,
85				<&iomuxc_gpio_disp_b2_07_enet_rdata01>;
86			drive-strength = "high";
87			bias-pull-down;
88			slew-rate = "fast";
89			input-enable;
90		};
91		group2 {
92			pinmux = <&iomuxc_lpsr_gpio_lpsr_12_gpio12_io12>;
93			drive-strength = "high";
94			bias-pull-up;
95			slew-rate = "fast";
96		};
97		group3 {
98			pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>,
99				<&iomuxc_gpio_disp_b2_03_enet_tdata01>,
100				<&iomuxc_gpio_disp_b2_04_enet_tx_en>;
101			drive-strength = "high";
102			slew-rate = "fast";
103		};
104		group4 {
105			pinmux = <&iomuxc_gpio_disp_b2_05_enet_ref_clk>;
106			drive-strength = "high";
107			slew-rate = "slow";
108			input-enable;
109		};
110	};
111
112	pinmux_enet_mdio: pinmux_enet_mdio {
113		group0 {
114			pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
115				<&iomuxc_gpio_ad_33_enet_mdio>;
116			drive-strength = "high";
117			slew-rate = "fast";
118		};
119	};
120
121	pinmux_ptp: pinmux_ptp {
122	};
123};
124