1.. _dragino_nbsn95_board:
2
3Dragino NBSN95 NB-IoT Sensor Node
4#################################
5
6Overview
7********
8
9The Dragino NBSN95 NB-IoT Sensor Node for IoT allows users to develop
10applications with NB-IoT connectivity via the Quectel BC95-G.
11Dragino NBSN95 enables a wide diversity of applications by exploiting
12low-power communication, ARM |reg| Cortex |reg|-M0 core-based
13STM32L0 Series features.
14
15This kit provides:
16
17- STM32L072CZ MCU
18- Quectel BC95-G NB-IoT
19- Expansion connectors:
20        - PMOD
21- Li/SOCI2 Unchargable Battery
22- GPIOs exposed via screw terminals on the carrier board
23- Housing
24
25.. image:: img/dragino_nbsn95.jpg
26     :align: center
27     :alt: Dragino NBSN95
28
29More information about the board can be found at the `Dragino NBSN95 website`_.
30
31Hardware
32********
33
34The STM32L072CZ SoC provides the following hardware IPs:
35
36- Ultra-low-power (down to 0.29 µA Standby mode and 93 uA/MHz run mode)
37- Core: ARM |reg| 32-bit Cortex |reg|-M0+ CPU, frequency up to 32 MHz
38- Clock Sources:
39
40        - 1 to 32 MHz crystal oscillator
41        - 32 kHz crystal oscillator for RTC (LSE)
42        - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
43        - Internal low-power 37 kHz RC ( |plusminus| 5%)
44        - Internal multispeed low-power 65 kHz to 4.2 MHz RC
45- RTC with HW calendar, alarms and calibration
46- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
47- 11x timers:
48
49        - 2x 16-bit with up to 4 channels
50        - 2x 16-bit with up to 2 channels
51        - 1x 16-bit ultra-low-power timer
52        - 1x SysTick
53        - 1x RTC
54        - 2x 16-bit basic for DAC
55        - 2x watchdogs (independent/window)
56- Up to 84 fast I/Os, most 5 V-tolerant.
57- Memories
58
59        - Up to 192 KB Flash, 2 banks read-while-write, proprietary code readout protection
60        - Up to 20 KB of SRAM
61        - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
62- Rich analog peripherals (independent supply)
63
64        - 1x 12-bit ADC 1.14 MSPS
65        - 2x 12-bit DAC
66        - 2x ultra-low-power comparators
67- 11x communication interfaces
68
69        - USB OTG 2.0 full-speed, LPM and BCD
70        - 3x I2C FM+(1 Mbit/s), SMBus/PMBus
71        - 4x USARTs (ISO 7816, LIN, IrDA, modem)
72        - 6x SPIs (4x SPIs with the Quad SPI)
73- 7-channel DMA controller
74- True random number generator
75- CRC calculation unit, 96-bit unique ID
76- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
77
78
79More information about STM32L072CZ can be found here:
80
81        - `STM32L072CZ on www.st.com`_
82        - `STM32L0x2 reference manual`_
83
84Supported Features
85==================
86
87The Zephyr Dragino NBSN95 board configuration supports the following hardware features:
88
89+-----------+------------+-------------------------------------+
90| Interface | Controller | Driver/Component                    |
91+===========+============+=====================================+
92| UART      | on-chip    | serial port-polling;                |
93|           |            | serial port-interrupt               |
94+-----------+------------+-------------------------------------+
95| PINMUX    | on-chip    | pinmux                              |
96+-----------+------------+-------------------------------------+
97| GPIO      | on-chip    | gpio                                |
98+-----------+------------+-------------------------------------+
99
100Other hardware features are not yet supported on this Zephyr port.
101
102The default configuration can be found in the defconfig file:
103
104	``boards/arm/dragino_nbsn95/dragino_nbsn95_defconfig``
105
106
107Connections and IOs
108===================
109
110Dragino NBSN95 Board has GPIO controllers. These controllers are responsible for pin muxing,
111input/output, pull-up, etc.
112
113Available pins:
114---------------
115
116For detailed information about available pins please refer to `Dragino NBSN95 website`_.
117
118Default Zephyr Peripheral Mapping:
119----------------------------------
120
121- UART_1_TX : PB6
122- UART_1_RX : PB7
123- UART_2_TX : PA2
124- UART_2_RX : PA3
125
126System Clock
127------------
128
129Dragino NBSN95 System Clock is at 32MHz,
130
131Serial Port
132-----------
133
134Dragino NBSN95 board has 2 U(S)ARTs. The Zephyr console output is assigned to UART1.
135Default settings are 115200 8N1.
136
137Programming and Debugging
138*************************
139
140Applications for the ``dragino_nbsn95`` board configuration can be built and
141flashed in the usual way (see :ref:`build_an_application` and
142:ref:`application_run` for more details).
143
144Flashing
145========
146
147Dragino NBSN95  board requires an external debugger.
148
149Flashing an application to Dragino NBSN95
150-----------------------------------------
151
152Here is an example for the :ref:`hello_world` application.
153
154Connect the Dragino NBSN95 to a STLinkV2 to your host computer using the USB port, then
155run a serial host program to connect with your board. For example:
156
157.. code-block:: console
158
159   $ minicom -D /dev/ttyACM0
160
161Then build and flash the application:
162
163.. zephyr-app-commands::
164   :zephyr-app: samples/hello_world
165   :board: dragino_nbsn95
166   :goals: build flash
167
168You should see the following message on the console:
169
170.. code-block:: console
171
172   $ Hello World! dragino_nbsn95
173
174Debugging
175=========
176
177You can debug an application in the usual way.  Here is an example for the
178:ref:`hello_world` application.
179
180.. zephyr-app-commands::
181   :zephyr-app: samples/hello_world
182   :board: dragino_nbsn95
183   :maybe-skip-config:
184   :goals: debug
185
186.. _Dragino NBSN95 website:
187   https://www.dragino.com/products/nb-iot/item/163-nbsn95.html
188
189.. _STM32L072CZ on www.st.com:
190   https://www.st.com/en/microcontrollers/stm32l072cz.html
191
192.. _STM32L0x2 reference manual:
193   https://www.st.com/resource/en/reference_manual/DM00108281.pdf
194