1 /*
2 * Copyright (c) 2022 Intel Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/arch/xtensa/syscall.h>
8
xtensa_syscall_helper(uintptr_t arg1,uintptr_t arg2,uintptr_t arg3,uintptr_t arg4,uintptr_t arg5,uintptr_t arg6,uintptr_t call_id)9 uintptr_t xtensa_syscall_helper(uintptr_t arg1, uintptr_t arg2,
10 uintptr_t arg3, uintptr_t arg4,
11 uintptr_t arg5, uintptr_t arg6,
12 uintptr_t call_id)
13 {
14 register uintptr_t a2 __asm__("%a2") = call_id;
15 register uintptr_t a6 __asm__("%a6") = arg1;
16 register uintptr_t a3 __asm__("%a3") = arg2;
17 register uintptr_t a4 __asm__("%a4") = arg3;
18 register uintptr_t a5 __asm__("%a5") = arg4;
19 register uintptr_t a8 __asm__("%a8") = arg5;
20 register uintptr_t a9 __asm__("%a9") = arg6;
21
22 __asm__ volatile("syscall\n\t"
23 : "=r" (a2)
24 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
25 "r" (a5), "r" (a8), "r" (a9)
26 : "memory");
27
28 return a2;
29 }
30