1 /*
2 * Copyright (c) 2022 Intel Corporation
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6 #include <zephyr/kernel.h>
7 #include <zephyr/irq_offload.h>
8 #include <zsr.h>
9 #include <zephyr/irq.h>
10
11 static struct {
12 irq_offload_routine_t fn;
13 const void *arg;
14 } offload_params[CONFIG_MP_MAX_NUM_CPUS];
15
irq_offload_isr(const void * param)16 static void irq_offload_isr(const void *param)
17 {
18 ARG_UNUSED(param);
19 uint8_t cpu_id = _current_cpu->id;
20
21 offload_params[cpu_id].fn(offload_params[cpu_id].arg);
22 }
23
arch_irq_offload(irq_offload_routine_t routine,const void * parameter)24 void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
25 {
26 IRQ_CONNECT(ZSR_IRQ_OFFLOAD_INT, 0, irq_offload_isr, NULL, 0);
27
28 unsigned int intenable, key = arch_irq_lock();
29 uint8_t cpu_id = _current_cpu->id;
30
31 offload_params[cpu_id].fn = routine;
32 offload_params[cpu_id].arg = parameter;
33
34 __asm__ volatile("rsr %0, INTENABLE" : "=r"(intenable));
35 intenable |= BIT(ZSR_IRQ_OFFLOAD_INT);
36 __asm__ volatile("wsr %0, INTENABLE; wsr %0, INTSET; rsync"
37 :: "r"(intenable), "r"(BIT(ZSR_IRQ_OFFLOAD_INT)));
38 arch_irq_unlock(key);
39 }
40
