1 /* 2 * Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_ 8 #define ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_ 9 10 #include <offsets.h> 11 12 /* kernel */ 13 14 /* nothing for now */ 15 16 /* end - kernel */ 17 18 /* threads */ 19 20 #define _thread_offset_to_basepri \ 21 (___thread_t_arch_OFFSET + ___thread_arch_t_basepri_OFFSET) 22 23 #define _thread_offset_to_preempt_float \ 24 (___thread_t_arch_OFFSET + ___thread_arch_t_preempt_float_OFFSET) 25 26 #if defined(CONFIG_CPU_AARCH32_CORTEX_A) || defined(CONFIG_CPU_AARCH32_CORTEX_R) 27 #define _thread_offset_to_exception_depth \ 28 (___thread_t_arch_OFFSET + ___thread_arch_t_exception_depth_OFFSET) 29 30 #define _cpu_offset_to_exc_depth \ 31 (___cpu_t_arch_OFFSET + ___cpu_arch_t_exc_depth_OFFSET) 32 #endif 33 34 #if defined(CONFIG_USERSPACE) || defined(CONFIG_FPU_SHARING) 35 #define _thread_offset_to_mode \ 36 (___thread_t_arch_OFFSET + ___thread_arch_t_mode_OFFSET) 37 #endif 38 39 #if defined(CONFIG_ARM_STORE_EXC_RETURN) 40 #define _thread_offset_to_mode_exc_return \ 41 (___thread_t_arch_OFFSET + ___thread_arch_t_mode_exc_return_OFFSET) 42 #endif 43 44 #ifdef CONFIG_USERSPACE 45 #define _thread_offset_to_priv_stack_start \ 46 (___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_start_OFFSET) 47 48 #if defined(CONFIG_CPU_AARCH32_CORTEX_R) 49 #define _thread_offset_to_priv_stack_end \ 50 (___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_end_OFFSET) 51 52 #define _thread_offset_to_sp_usr \ 53 (___thread_t_arch_OFFSET + ___thread_arch_t_sp_usr_OFFSET) 54 #endif 55 #endif 56 57 #if defined(CONFIG_THREAD_STACK_INFO) 58 #define _thread_offset_to_stack_info_start \ 59 (___thread_stack_info_t_start_OFFSET + ___thread_t_stack_info_OFFSET) 60 #endif 61 62 63 /* end - threads */ 64 65 #endif /* ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_ */ 66
