1 /*
2 * Copyright (c) 2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /**
8 * @file
9 * @brief Full C support initialization
10 *
11 *
12 * Initialization of full C support: zero the .bss, copy the .data if XIP,
13 * call z_cstart().
14 *
15 * Stack is available in this module, but not the global data/bss until their
16 * initialization is performed.
17 */
18
19 #include <zephyr/types.h>
20 #include <zephyr/toolchain.h>
21 #include <zephyr/linker/linker-defs.h>
22 #include <zephyr/arch/arc/v2/aux_regs.h>
23 #include <zephyr/arch/arc/cluster.h>
24 #include <zephyr/kernel_structs.h>
25 #include <kernel_internal.h>
26
27 /* XXX - keep for future use in full-featured cache APIs */
28 #if 0
29 /**
30 * @brief Disable the i-cache if present
31 *
32 * For those ARC CPUs that have a i-cache present,
33 * invalidate the i-cache and then disable it.
34 */
35
36 static void disable_icache(void)
37 {
38 unsigned int val;
39
40 val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
41 val &= 0xff; /* version field */
42 if (val == 0) {
43 return; /* skip if i-cache is not present */
44 }
45 z_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
46 __builtin_arc_nop();
47 z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
48 }
49
50 /**
51 * @brief Invalidate the data cache if present
52 *
53 * For those ARC CPUs that have a data cache present,
54 * invalidate the data cache.
55 */
56
57 static void invalidate_dcache(void)
58 {
59 unsigned int val;
60
61 val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
62 val &= 0xff; /* version field */
63 if (val == 0) {
64 return; /* skip if d-cache is not present */
65 }
66 z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
67 }
68 #endif
69
70 #ifdef CONFIG_ISA_ARCV3
71 /* NOTE: it will be called from early C code - we must NOT use global / static variables in it! */
arc_cluster_scm_enable(void)72 static void arc_cluster_scm_enable(void)
73 {
74 unsigned int cluster_version;
75
76 /* Check that we have cluster and its version is supported */
77 cluster_version = z_arc_v2_aux_reg_read(_ARC_REG_CLN_BCR) & _ARC_CLN_BCR_VER_MAJOR_MASK;
78 if (cluster_version < _ARC_REG_CLN_BCR_VER_MAJOR_ARCV3_MIN) {
79 return;
80 }
81
82 /* Check that we have shared cache in cluster */
83 if (!(z_arc_v2_aux_reg_read(_ARC_CLNR_BCR_0) & _ARC_CLNR_BCR_0_HAS_SCM)) {
84 return;
85 }
86
87 /* Disable SCM, just in case. */
88 arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, 0);
89
90 /* Invalidate SCM before enabling. */
91 arc_cln_write_reg_nolock(ARC_CLN_CACHE_CMD,
92 ARC_CLN_CACHE_CMD_OP_REG_INV | ARC_CLN_CACHE_CMD_INCR);
93 while (arc_cln_read_reg_nolock(ARC_CLN_CACHE_STATUS) & ARC_CLN_CACHE_STATUS_BUSY)
94 ;
95
96 arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, ARC_CLN_CACHE_STATUS_EN);
97 }
98 #endif /* CONFIG_ISA_ARCV3 */
99
100 #ifdef __CCAC__
101 extern char __device_states_start[];
102 extern char __device_states_end[];
103 /**
104 * @brief Clear device_states section
105 *
106 * This routine clears the device_states section,
107 * as MW compiler marks the section with NOLOAD flag.
108 */
dev_state_zero(void)109 static void dev_state_zero(void)
110 {
111 z_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
112 }
113 #endif
114
115 extern FUNC_NORETURN void z_cstart(void);
116 /**
117 * @brief Prepare to and run C code
118 *
119 * This routine prepares for the execution of and runs C code.
120 */
121
z_prep_c(void)122 void z_prep_c(void)
123 {
124 #ifdef CONFIG_ISA_ARCV3
125 arc_cluster_scm_enable();
126 #endif
127
128 z_bss_zero();
129 #ifdef __CCAC__
130 dev_state_zero();
131 #endif
132 z_data_copy();
133 z_cstart();
134 CODE_UNREACHABLE;
135 }
136
