1# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
2# SPDX-License-Identifier: Apache-2.0
3
4if SOC_SERIES_ESP32S3
5
6config IDF_TARGET_ESP32S3
7	bool "ESP32S3 as target SOC"
8	default y
9
10config SOC_TOOLCHAIN_NAME
11	string
12	default "espressif_esp32s3"
13
14choice SOC_PART_NUMBER
15	prompt "ESP32-S3 SOC Selection"
16
17	# SoC with/without embedded flash
18	config SOC_ESP32S3_R2
19		bool "ESP32S3_R2"
20	config SOC_ESP32S3_R8
21		bool "ESP32S3_R8"
22	config SOC_ESP32S3_R8V
23		bool "ESP32S3_R8V"
24	config SOC_ESP32S3_FN8
25		bool "ESP32S3_FN8"
26	config SOC_ESP32S3_PICO_N8R2
27		bool "ESP32S3_PICO_N8R2"
28	config SOC_ESP32S3_PICO_N8R8
29		bool "ESP32S3_PICO_N8R8"
30	# SiP with flash and/or psram
31	config SOC_ESP32S3_MINI_N8
32		bool "ESP32S3_MINI_N8"
33	config SOC_ESP32S3_MINI_N4R2
34		bool "ESP32S3_MINI_N4R2"
35	config SOC_ESP32S3_WROOM_N4
36		bool "ESP32S3_WROOM_N4"
37	config SOC_ESP32S3_WROOM_N8
38		bool "ESP32S3_WROOM_N8"
39	config SOC_ESP32S3_WROOM_N16
40		bool "ESP32S3_WROOM_N16"
41	config SOC_ESP32S3_WROOM_N4R8
42		bool "ESP32S3_WROOM_N4R8"
43	config SOC_ESP32S3_WROOM_N8R8
44		bool "ESP32S3_WROOM_N8R8"
45	config SOC_ESP32S3_WROOM_N16R8
46		bool "ESP32S3_WROOM_N16"
47
48endchoice # SOC_PART_NUMBER
49
50config ESP32S3_APPCPU_IRAM
51	hex "ESP32S3 APPCPU IRAM size"
52	depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
53	default 0x20000
54	help
55	  Defines APPCPU IRAM area in bytes.
56
57config ESP32S3_APPCPU_DRAM
58	hex "ESP32S3 APPCPU DRAM size"
59	depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
60	default 0x10000
61	help
62	  Defines APPCPU DRAM area in bytes.
63
64choice ESP32S3_RTC_CLK_SRC
65	prompt "RTC clock source"
66	default ESP32S3_RTC_CLK_SRC_INT_RC
67	help
68	  Choose which clock is used as RTC clock source.
69
70	config ESP32S3_RTC_CLK_SRC_INT_RC
71		bool "Internal 150kHz RC oscillator"
72	config ESP32S3_RTC_CLK_SRC_EXT_CRYS
73		bool "External 32kHz crystal"
74		select ESP_SYSTEM_RTC_EXT_XTAL
75	config ESP32S3_RTC_CLK_SRC_EXT_OSC
76		bool "External 32kHz oscillator at 32K_XP pin"
77		select ESP_SYSTEM_RTC_EXT_OSC
78	config ESP32S3_RTC_CLK_SRC_INT_8MD256
79		bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
80endchoice
81
82config ESP32S3_RTC_CLK_CAL_CYCLES
83	int "Number of cycles for RTC_SLOW_CLK calibration"
84	default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
85	default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC
86	range 0 27000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
87	range 0 32766 if ESP32S3_RTC_CLK_SRC_INT_RC
88	help
89	  When the startup code initializes RTC_SLOW_CLK, it can perform
90	  calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
91	  frequency. This option sets the number of RTC_SLOW_CLK cycles measured
92	  by the calibration routine. Higher numbers increase calibration
93	  precision, which may be important for applications which spend a lot of
94	  time in deep sleep. Lower numbers reduce startup time.
95
96	  When this option is set to 0, clock calibration will not be performed at
97	  startup, and approximate clock frequencies will be assumed:
98
99	  - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
100	  - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
101	  In case more value will help improve the definition of the launch of the crystal.
102	  If the crystal could not start, it will be switched to internal RC.
103
104choice ESP32_UNIVERSAL_MAC_ADDRESSES
105	bool "Number of universally administered (by IEEE) MAC address"
106	default ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
107	help
108	  Configure the number of universally administered (by IEEE) MAC addresses.
109	  During initialization, MAC addresses for each network interface are generated or
110	  derived from a single base MAC address. If the number of universal MAC addresses is four,
111	  all four interfaces (WiFi station, WiFi softap, Bluetooth and Ethernet) receive a universally
112	  administered MAC address. These are generated sequentially by adding 0, 1, 2 and 3 (respectively)
113	  to the final octet of the base MAC address. If the number of universal MAC addresses is two,
114	  only two interfaces (WiFi station and Bluetooth) receive a universally administered MAC address.
115	  These are generated sequentially by adding 0 and 1 (respectively) to the base MAC address.
116	  The remaining two interfaces (WiFi softap and Ethernet) receive local MAC addresses.
117	  These are derived from the universal WiFi station and Bluetooth MAC addresses, respectively.
118	  When using the default (Espressif-assigned) base MAC address, either setting can be used.
119	  When using a custom universal MAC address range, the correct setting will depend on the
120	  allocation of MAC addresses in this range (either 2 or 4 per device.)
121
122config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
123	bool "Two"
124	select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
125	select ESP_MAC_ADDR_UNIVERSE_BT
126
127config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
128	bool "Four"
129	select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
130	select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
131	select ESP_MAC_ADDR_UNIVERSE_BT
132	select ESP_MAC_ADDR_UNIVERSE_ETH
133
134endchoice # ESP32_UNIVERSAL_MAC_ADDRESSES
135
136config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
137	bool
138
139config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
140	bool
141
142config ESP_MAC_ADDR_UNIVERSE_BT
143	bool
144
145config ESP_MAC_ADDR_UNIVERSE_ETH
146	bool
147
148config ESP32_UNIVERSAL_MAC_ADDRESSES
149	int
150	default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
151	default 4 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
152
153config ESP32_PHY_MAX_WIFI_TX_POWER
154	int "Max WiFi/BLE TX power (dBm)"
155	range 10 20
156	default 20
157	help
158	  Set maximum transmit power for WiFi radio. Actual transmit power for high
159	  data rates may be lower than this setting.
160
161config ESP32_PHY_MAX_TX_POWER
162	int
163	default ESP32_PHY_MAX_WIFI_TX_POWER
164
165menu "Cache config"
166
167choice ESP32S3_INSTRUCTION_CACHE_SIZE
168	prompt "Instruction cache size"
169	default ESP32S3_INSTRUCTION_CACHE_16KB
170	help
171	  Instruction cache size to be set on application startup.
172	  If you use 16KB instruction cache rather than 32KB instruction cache,
173	  then the other 16KB will be managed by heap allocator.
174
175	config ESP32S3_INSTRUCTION_CACHE_16KB
176		bool "16KB"
177	config ESP32S3_INSTRUCTION_CACHE_32KB
178		bool "32KB"
179endchoice
180
181config ESP32S3_INSTRUCTION_CACHE_SIZE
182	hex
183	default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
184	default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
185
186choice ESP32S3_ICACHE_ASSOCIATED_WAYS
187	prompt "Instruction cache associated ways"
188	default ESP32S3_INSTRUCTION_CACHE_8WAYS
189	help
190	  Instruction cache associated ways to be set on application startup.
191
192	config ESP32S3_INSTRUCTION_CACHE_4WAYS
193		bool "4 ways"
194	config ESP32S3_INSTRUCTION_CACHE_8WAYS
195		bool "8 ways"
196endchoice
197
198config ESP32S3_ICACHE_ASSOCIATED_WAYS
199	int
200	default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
201	default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
202
203choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
204	prompt "Instruction cache line size"
205	default ESP32S3_INSTRUCTION_CACHE_LINE_32B
206	help
207	  Instruction cache line size to be set on application startup.
208
209	config ESP32S3_INSTRUCTION_CACHE_LINE_16B
210		bool "16 Bytes"
211		depends on ESP32S3_INSTRUCTION_CACHE_16KB
212	config ESP32S3_INSTRUCTION_CACHE_LINE_32B
213		bool "32 Bytes"
214endchoice
215
216config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
217	int
218	default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
219	default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
220
221config ESP32S3_INSTRUCTION_CACHE_WRAP
222	bool "Define instruction cache wrap mode"
223	help
224	  If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
225	  The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
226	  However, it depends on complex conditions.
227
228choice ESP32S3_DATA_CACHE_SIZE
229	prompt "Data cache size"
230	default ESP32S3_DATA_CACHE_32KB
231	help
232	  Data cache size to be set on application startup.
233	  If you use 32KB data cache rather than 64KB data cache,
234	  the other 32KB will be added to the heap.
235
236	config ESP32S3_DATA_CACHE_16KB
237		bool "16KB"
238	config ESP32S3_DATA_CACHE_32KB
239		bool "32KB"
240	config ESP32S3_DATA_CACHE_64KB
241		bool "64KB"
242endchoice
243
244config ESP32S3_DATA_CACHE_SIZE
245	hex
246	# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
247	default 0x8000 if ESP32S3_DATA_CACHE_16KB
248	default 0x8000 if ESP32S3_DATA_CACHE_32KB
249	default 0x10000 if ESP32S3_DATA_CACHE_64KB
250
251choice ESP32S3_DCACHE_ASSOCIATED_WAYS
252	prompt "Data cache associated ways"
253	default ESP32S3_DATA_CACHE_8WAYS
254	help
255	  Data cache associated ways to be set on application startup.
256
257	config ESP32S3_DATA_CACHE_4WAYS
258		bool "4 ways"
259	config ESP32S3_DATA_CACHE_8WAYS
260		bool "8 ways"
261endchoice
262
263config ESP32S3_DCACHE_ASSOCIATED_WAYS
264	int
265	default 4 if ESP32S3_DATA_CACHE_4WAYS
266	default 8 if ESP32S3_DATA_CACHE_8WAYS
267
268choice ESP32S3_DATA_CACHE_LINE_SIZE
269	prompt "Data cache line size"
270	default ESP32S3_DATA_CACHE_LINE_32B
271	help
272	  Data cache line size to be set on application startup.
273
274	config ESP32S3_DATA_CACHE_LINE_16B
275		bool "16 Bytes"
276		depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
277	config ESP32S3_DATA_CACHE_LINE_32B
278		bool "32 Bytes"
279	config ESP32S3_DATA_CACHE_LINE_64B
280		bool "64 Bytes"
281endchoice
282
283config ESP32S3_DATA_CACHE_LINE_SIZE
284	int
285	default 16 if ESP32S3_DATA_CACHE_LINE_16B
286	default 32 if ESP32S3_DATA_CACHE_LINE_32B
287	default 64 if ESP32S3_DATA_CACHE_LINE_64B
288
289config ESP32S3_DATA_CACHE_WRAP
290	bool "Define data cache wrap mode"
291	help
292	  If enabled, data cache will use wrap mode to read spi flash or spi ram.
293	  The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
294	  However, it depends on complex conditions.
295
296config MAC_BB_PD
297	bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
298	depends on SOC_SERIES_ESP32S3 && TICKLESS_KERNEL
299	default n
300	help
301	  If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
302	  down when PHY is disabled. Enabling this setting reduces power consumption
303	  by a small amount but increases RAM use by approximat
304
305endmenu  # Cache config
306
307menu "PSRAM Clock and CS IO for ESP32S3"
308	depends on ESP_SPIRAM
309
310config DEFAULT_PSRAM_CLK_IO
311	int "PSRAM CLK IO number"
312	range 0 33
313	default 30
314	help
315	  The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design.
316
317config DEFAULT_PSRAM_CS_IO
318	int "PSRAM CS IO number"
319	range 0 33
320	default 26
321	help
322	  The PSRAM CS IO can be any unused GPIO, please refer to your hardware design.
323
324endmenu # PSRAM clock and cs IO for ESP32S3
325
326endif # SOC_SERIES_ESP32S3
327